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1
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//Register map for use with AN428 (JumpStart)
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2
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//http://www.skyworksinc.com/timing
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3
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//#BEGIN_HEADER
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4
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//Date = Tuesday, July 11, 2023 1:11 PM
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5
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//File version = 3
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6
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//Software Name = ClockBuilder Pro
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7
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//Software version = 4.9.0.0
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8
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//Software date = 4 11, 2023
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9
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//Chip = Si533x
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10
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//Part Number = Si533x
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11
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//#END_HEADER
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12
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//Input Frequency (MHz) = 25.000000000
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13
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//Input Type = Crystal
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14
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//P1 = 1
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15
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//Input Mux = XoClk
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16
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//FDBK Input Frequency (MHz) = 25.000000000
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17
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//FDBK Input Type = OFF
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18
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//P2 = 1
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19
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//FDBK Mux = NoClk
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20
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//PFD Input Frequency (MHz) = 25.000000000
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21
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//VCO Frequency (GHz) = 2.666666
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22
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//N = 106 8333/12500 (106.6666)
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23
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//Internal feedback enabled
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24
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//Output Clock 0
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25
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// Output is off
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26
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//Output Clock 1
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27
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// Output Frequency (MHz) = 266.666600000
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28
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// Mux Selection = IDn
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|
29
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// MultiSynth = 10 (10.0000)
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30
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// R = 1
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31
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//Output Clock 2
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32
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// Output Frequency (MHz) = 266.666600000
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33
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// Mux Selection = IDn
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|
34
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// MultiSynth = 10 (10.0000)
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35
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// R = 1
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36
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//Output Clock 3
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|
37
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// Output is off
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38
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//Driver 0
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|
39
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// Disabled
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|
40
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// Powered off
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|
41
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// Output voltage = 3.30
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|
42
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// Output type = 3.3V LVDS
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43
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// Output state when disabled = StopLow
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44
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//Driver 1
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45
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// Enabled
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46
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// Powered on
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47
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// Output voltage = 1.80
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|
48
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// Output type = 1.8V LVDS
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|
49
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// Output state when disabled = AlwaysOn
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|
50
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//Driver 2
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51
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// Enabled
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52
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// Powered on
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53
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// Output voltage = 1.80
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|
54
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// Output type = 1.8V LVDS
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55
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// Output state when disabled = AlwaysOn
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56
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//Driver 3
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57
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// Disabled
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58
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// Powered off
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59
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// Output voltage = 3.30
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60
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// Output type = 3.3V LVDS
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61
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// Output state when disabled = StopLow
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62
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//Clock 0 phase inc/dec step size (ns) = 0.000
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63
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//Clock 1 phase inc/dec step size (ns) = 0.000
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64
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//Clock 2 phase inc/dec step size (ns) = 0.000
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65
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//Clock 3 phase inc/dec step size (ns) = 0.000
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66
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//Phase increment and decrement pin control is off
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67
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//Frequency increment and decrement pin control is off
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68
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//Frequency increment and decrement is disabled
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69
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//Initial phase offset 0 (ns) = 0.000
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70
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//Initial phase offset 1 (ns) = 0.000
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71
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//Initial phase offset 2 (ns) = 0.000
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72
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//Initial phase offset 3 (ns) = 0.000
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73
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//SSC is disabled
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74
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|
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75
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#define NUM_REGS_MAX 350
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76
|
|
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77
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typedef struct Reg_Data{
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78
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unsigned char Reg_Addr;
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79
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unsigned char Reg_Val;
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80
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unsigned char Reg_Mask;
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81
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} Reg_Data;
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82
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83
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Reg_Data const code Reg_Store[NUM_REGS_MAX] = {
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84
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{ 0,0x00,0x00},
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85
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{ 1,0x00,0x00},
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86
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{ 2,0x00,0x00},
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87
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{ 3,0x00,0x00},
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88
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{ 4,0x00,0x00},
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89
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{ 5,0x00,0x00},
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90
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{ 6,0x08,0x1D},
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91
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{ 7,0x00,0x00},
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92
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{ 8,0x70,0x00},
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93
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{ 9,0x0F,0x00},
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|
94
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{ 10,0x00,0x00},
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|
95
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{ 11,0x00,0x00},
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|
96
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{ 12,0x00,0x00},
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|
97
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{ 13,0x00,0x00},
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|
98
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{ 14,0x00,0x00},
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|
99
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{ 15,0x00,0x00},
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100
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{ 16,0x00,0x00},
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101
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{ 17,0x00,0x00},
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102
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{ 18,0x00,0x00},
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103
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{ 19,0x00,0x00},
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|
104
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{ 20,0x00,0x00},
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|
105
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{ 21,0x00,0x00},
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106
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{ 22,0x00,0x00},
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|
107
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{ 23,0x00,0x00},
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|
108
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{ 24,0x00,0x00},
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|
109
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{ 25,0x00,0x00},
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110
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{ 26,0x00,0x00},
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111
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{ 27,0xF0,0x80},
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112
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{ 28,0x16,0xFF},
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113
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{ 29,0x90,0xFF},
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114
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{ 30,0xB0,0xFF},
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115
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{ 31,0xE3,0xFF},
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116
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{ 32,0xC0,0xFF},
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117
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{ 33,0xC0,0xFF},
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118
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{ 34,0xE3,0xFF},
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119
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{ 35,0x28,0xFF},
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120
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{ 36,0x00,0x1F},
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121
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{ 37,0x06,0x1F},
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122
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{ 38,0x06,0x1F},
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123
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{ 39,0x00,0x1F},
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124
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{ 40,0x83,0xFF},
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125
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{ 41,0x10,0x7F},
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126
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{ 42,0x23,0x3F},
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127
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{ 43,0x00,0x00},
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128
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{ 44,0x00,0x00},
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|
129
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{ 45,0x00,0xFF},
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130
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{ 46,0x00,0xFF},
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131
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{ 47,0x14,0x3F},
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132
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{ 48,0x33,0xFF},
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133
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{ 49,0x00,0xFF},
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|
134
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{ 50,0xC3,0xFF},
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|
135
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{ 51,0x07,0xFF},
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136
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{ 52,0x10,0xFF},
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137
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{ 53,0x00,0xFF},
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|
138
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{ 54,0x00,0xFF},
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|
139
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{ 55,0x00,0xFF},
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|
140
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{ 56,0x00,0xFF},
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|
141
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{ 57,0x00,0xFF},
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|
142
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{ 58,0x00,0xFF},
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|
143
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{ 59,0x00,0xFF},
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|
144
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{ 60,0x00,0xFF},
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|
145
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{ 61,0x00,0xFF},
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146
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{ 62,0x00,0x3F},
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|
147
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{ 63,0x10,0xFF},
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|
148
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{ 64,0x00,0xFF},
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|
149
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{ 65,0x03,0xFF},
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|
150
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{ 66,0x00,0xFF},
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|
151
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{ 67,0x00,0xFF},
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|
152
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{ 68,0x00,0xFF},
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153
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{ 69,0x00,0xFF},
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154
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{ 70,0x01,0xFF},
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155
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{ 71,0x00,0xFF},
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156
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{ 72,0x00,0xFF},
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157
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{ 73,0x00,0x3F},
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158
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{ 74,0x10,0xFF},
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159
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{ 75,0x00,0xFF},
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160
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{ 76,0x03,0xFF},
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161
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{ 77,0x00,0xFF},
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162
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{ 78,0x00,0xFF},
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163
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{ 79,0x00,0xFF},
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164
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{ 80,0x00,0xFF},
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165
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{ 81,0x01,0xFF},
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166
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{ 82,0x00,0xFF},
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167
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{ 83,0x00,0xFF},
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168
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{ 84,0x00,0x3F},
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|
169
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{ 85,0x10,0xFF},
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|
170
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{ 86,0x00,0xFF},
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|
171
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{ 87,0x00,0xFF},
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|
172
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{ 88,0x00,0xFF},
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|
173
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{ 89,0x00,0xFF},
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|
174
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{ 90,0x00,0xFF},
|
|
175
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{ 91,0x00,0xFF},
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|
176
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{ 92,0x00,0xFF},
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|
177
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{ 93,0x00,0xFF},
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178
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{ 94,0x00,0xFF},
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179
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{ 95,0x00,0x3F},
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|
180
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{ 96,0x10,0x00},
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181
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{ 97,0x55,0xFF},
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182
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{ 98,0x33,0xFF},
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183
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{ 99,0x70,0xFF},
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184
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{100,0x40,0xFF},
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185
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{101,0x00,0xFF},
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186
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{102,0x00,0xFF},
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187
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{103,0xD4,0xFF},
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188
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{104,0x30,0xFF},
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189
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{105,0x00,0xFF},
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190
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{106,0x80,0xBF},
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191
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{107,0x00,0xFF},
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192
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{108,0x00,0xFF},
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193
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{109,0x00,0xFF},
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194
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{110,0x40,0xFF},
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195
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{111,0x00,0xFF},
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196
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{112,0x00,0xFF},
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197
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{113,0x00,0xFF},
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198
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{114,0xC0,0xFF},
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199
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{115,0x00,0xFF},
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200
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{116,0x80,0xFF},
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201
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{117,0x00,0xFF},
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202
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{118,0xC0,0xFF},
|
|
203
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{119,0x00,0xFF},
|
|
204
|
{120,0x00,0xFF},
|
|
205
|
{121,0x00,0xFF},
|
|
206
|
{122,0x40,0xFF},
|
|
207
|
{123,0x00,0xFF},
|
|
208
|
{124,0x00,0xFF},
|
|
209
|
{125,0x00,0xFF},
|
|
210
|
{126,0x00,0xFF},
|
|
211
|
{127,0x00,0xFF},
|
|
212
|
{128,0x00,0xFF},
|
|
213
|
{129,0x00,0x0F},
|
|
214
|
{130,0x00,0x0F},
|
|
215
|
{131,0x00,0xFF},
|
|
216
|
{132,0x00,0xFF},
|
|
217
|
{133,0x00,0xFF},
|
|
218
|
{134,0x00,0xFF},
|
|
219
|
{135,0x00,0xFF},
|
|
220
|
{136,0x00,0xFF},
|
|
221
|
{137,0x00,0xFF},
|
|
222
|
{138,0x00,0xFF},
|
|
223
|
{139,0x00,0xFF},
|
|
224
|
{140,0x00,0xFF},
|
|
225
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{141,0x00,0xFF},
|
|
226
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{142,0x00,0xFF},
|
|
227
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{143,0x00,0xFF},
|
|
228
|
{144,0x00,0xFF},
|
|
229
|
{145,0x00,0x00},
|
|
230
|
{146,0xFF,0x00},
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|
231
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{147,0x00,0x00},
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|
232
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{148,0x00,0x00},
|
|
233
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{149,0x00,0x00},
|
|
234
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{150,0x00,0x00},
|
|
235
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{151,0x00,0x00},
|
|
236
|
{152,0x00,0xFF},
|
|
237
|
{153,0x00,0xFF},
|
|
238
|
{154,0x00,0xFF},
|
|
239
|
{155,0x00,0xFF},
|
|
240
|
{156,0x00,0xFF},
|
|
241
|
{157,0x00,0xFF},
|
|
242
|
{158,0x00,0x0F},
|
|
243
|
{159,0x00,0x0F},
|
|
244
|
{160,0x00,0xFF},
|
|
245
|
{161,0x00,0xFF},
|
|
246
|
{162,0x00,0xFF},
|
|
247
|
{163,0x00,0xFF},
|
|
248
|
{164,0x00,0xFF},
|
|
249
|
{165,0x00,0xFF},
|
|
250
|
{166,0x00,0xFF},
|
|
251
|
{167,0x00,0xFF},
|
|
252
|
{168,0x00,0xFF},
|
|
253
|
{169,0x00,0xFF},
|
|
254
|
{170,0x00,0xFF},
|
|
255
|
{171,0x00,0xFF},
|
|
256
|
{172,0x00,0xFF},
|
|
257
|
{173,0x00,0xFF},
|
|
258
|
{174,0x00,0xFF},
|
|
259
|
{175,0x00,0xFF},
|
|
260
|
{176,0x00,0xFF},
|
|
261
|
{177,0x00,0xFF},
|
|
262
|
{178,0x00,0xFF},
|
|
263
|
{179,0x00,0xFF},
|
|
264
|
{180,0x00,0xFF},
|
|
265
|
{181,0x00,0x0F},
|
|
266
|
{182,0x00,0xFF},
|
|
267
|
{183,0x00,0xFF},
|
|
268
|
{184,0x00,0xFF},
|
|
269
|
{185,0x00,0xFF},
|
|
270
|
{186,0x00,0xFF},
|
|
271
|
{187,0x00,0xFF},
|
|
272
|
{188,0x00,0xFF},
|
|
273
|
{189,0x00,0xFF},
|
|
274
|
{190,0x00,0xFF},
|
|
275
|
{191,0x00,0xFF},
|
|
276
|
{192,0x00,0xFF},
|
|
277
|
{193,0x00,0xFF},
|
|
278
|
{194,0x00,0xFF},
|
|
279
|
{195,0x00,0xFF},
|
|
280
|
{196,0x00,0xFF},
|
|
281
|
{197,0x00,0xFF},
|
|
282
|
{198,0x00,0xFF},
|
|
283
|
{199,0x00,0xFF},
|
|
284
|
{200,0x00,0xFF},
|
|
285
|
{201,0x00,0xFF},
|
|
286
|
{202,0x00,0xFF},
|
|
287
|
{203,0x00,0x0F},
|
|
288
|
{204,0x00,0xFF},
|
|
289
|
{205,0x00,0xFF},
|
|
290
|
{206,0x00,0xFF},
|
|
291
|
{207,0x00,0xFF},
|
|
292
|
{208,0x00,0xFF},
|
|
293
|
{209,0x00,0xFF},
|
|
294
|
{210,0x00,0xFF},
|
|
295
|
{211,0x00,0xFF},
|
|
296
|
{212,0x00,0xFF},
|
|
297
|
{213,0x00,0xFF},
|
|
298
|
{214,0x00,0xFF},
|
|
299
|
{215,0x00,0xFF},
|
|
300
|
{216,0x00,0xFF},
|
|
301
|
{217,0x00,0xFF},
|
|
302
|
{218,0x00,0x00},
|
|
303
|
{219,0x00,0x00},
|
|
304
|
{220,0x00,0x00},
|
|
305
|
{221,0x0D,0x00},
|
|
306
|
{222,0x00,0x00},
|
|
307
|
{223,0x00,0x00},
|
|
308
|
{224,0xF4,0x00},
|
|
309
|
{225,0xF0,0x00},
|
|
310
|
{226,0x00,0x00},
|
|
311
|
{227,0x00,0x00},
|
|
312
|
{228,0x00,0x00},
|
|
313
|
{229,0x00,0x00},
|
|
314
|
{231,0x00,0x00},
|
|
315
|
{232,0x00,0x00},
|
|
316
|
{233,0x00,0x00},
|
|
317
|
{234,0x00,0x00},
|
|
318
|
{235,0x00,0x00},
|
|
319
|
{236,0x00,0x00},
|
|
320
|
{237,0x00,0x00},
|
|
321
|
{238,0x14,0x00},
|
|
322
|
{239,0x00,0x00},
|
|
323
|
{240,0x00,0x00},
|
|
324
|
{242,0x02,0x02},
|
|
325
|
{243,0xF0,0x00},
|
|
326
|
{244,0x00,0x00},
|
|
327
|
{245,0x00,0x00},
|
|
328
|
{247,0x00,0x00},
|
|
329
|
{248,0x00,0x00},
|
|
330
|
{249,0xA8,0x00},
|
|
331
|
{250,0x00,0x00},
|
|
332
|
{251,0x84,0x00},
|
|
333
|
{252,0x00,0x00},
|
|
334
|
{253,0x00,0x00},
|
|
335
|
{254,0x00,0x00},
|
|
336
|
{255, 1, 0xFF}, // set page bit to 1
|
|
337
|
{ 0,0x00,0x00},
|
|
338
|
{ 1,0x00,0x00},
|
|
339
|
{ 2,0x00,0x00},
|
|
340
|
{ 3,0x00,0x00},
|
|
341
|
{ 4,0x00,0x00},
|
|
342
|
{ 5,0x00,0x00},
|
|
343
|
{ 6,0x00,0x00},
|
|
344
|
{ 7,0x00,0x00},
|
|
345
|
{ 8,0x00,0x00},
|
|
346
|
{ 9,0x00,0x00},
|
|
347
|
{ 10,0x00,0x00},
|
|
348
|
{ 11,0x00,0x00},
|
|
349
|
{ 12,0x00,0x00},
|
|
350
|
{ 13,0x00,0x00},
|
|
351
|
{ 14,0x00,0x00},
|
|
352
|
{ 15,0x00,0x00},
|
|
353
|
{ 16,0x00,0x00},
|
|
354
|
{ 17,0x01,0x00},
|
|
355
|
{ 18,0x00,0x00},
|
|
356
|
{ 19,0x00,0x00},
|
|
357
|
{ 20,0x90,0x00},
|
|
358
|
{ 21,0x31,0x00},
|
|
359
|
{ 22,0x00,0x00},
|
|
360
|
{ 23,0x00,0x00},
|
|
361
|
{ 24,0x01,0x00},
|
|
362
|
{ 25,0x00,0x00},
|
|
363
|
{ 26,0x00,0x00},
|
|
364
|
{ 27,0x00,0x00},
|
|
365
|
{ 28,0x00,0x00},
|
|
366
|
{ 29,0x00,0x00},
|
|
367
|
{ 30,0x00,0x00},
|
|
368
|
{ 31,0x00,0xFF},
|
|
369
|
{ 32,0x00,0xFF},
|
|
370
|
{ 33,0x01,0xFF},
|
|
371
|
{ 34,0x00,0xFF},
|
|
372
|
{ 35,0x00,0xFF},
|
|
373
|
{ 36,0x90,0xFF},
|
|
374
|
{ 37,0x31,0xFF},
|
|
375
|
{ 38,0x00,0xFF},
|
|
376
|
{ 39,0x00,0xFF},
|
|
377
|
{ 40,0x01,0xFF},
|
|
378
|
{ 41,0x00,0xFF},
|
|
379
|
{ 42,0x00,0xFF},
|
|
380
|
{ 43,0x00,0x0F},
|
|
381
|
{ 44,0x00,0x00},
|
|
382
|
{ 45,0x00,0x00},
|
|
383
|
{ 46,0x00,0x00},
|
|
384
|
{ 47,0x00,0xFF},
|
|
385
|
{ 48,0x00,0xFF},
|
|
386
|
{ 49,0x01,0xFF},
|
|
387
|
{ 50,0x00,0xFF},
|
|
388
|
{ 51,0x00,0xFF},
|
|
389
|
{ 52,0x90,0xFF},
|
|
390
|
{ 53,0x31,0xFF},
|
|
391
|
{ 54,0x00,0xFF},
|
|
392
|
{ 55,0x00,0xFF},
|
|
393
|
{ 56,0x01,0xFF},
|
|
394
|
{ 57,0x00,0xFF},
|
|
395
|
{ 58,0x00,0xFF},
|
|
396
|
{ 59,0x00,0x0F},
|
|
397
|
{ 60,0x00,0x00},
|
|
398
|
{ 61,0x00,0x00},
|
|
399
|
{ 62,0x00,0x00},
|
|
400
|
{ 63,0x00,0xFF},
|
|
401
|
{ 64,0x00,0xFF},
|
|
402
|
{ 65,0x01,0xFF},
|
|
403
|
{ 66,0x00,0xFF},
|
|
404
|
{ 67,0x00,0xFF},
|
|
405
|
{ 68,0x90,0xFF},
|
|
406
|
{ 69,0x31,0xFF},
|
|
407
|
{ 70,0x00,0xFF},
|
|
408
|
{ 71,0x00,0xFF},
|
|
409
|
{ 72,0x01,0xFF},
|
|
410
|
{ 73,0x00,0xFF},
|
|
411
|
{ 74,0x00,0xFF},
|
|
412
|
{ 75,0x00,0x0F},
|
|
413
|
{ 76,0x00,0x00},
|
|
414
|
{ 77,0x00,0x00},
|
|
415
|
{ 78,0x00,0x00},
|
|
416
|
{ 79,0x00,0xFF},
|
|
417
|
{ 80,0x00,0xFF},
|
|
418
|
{ 81,0x00,0xFF},
|
|
419
|
{ 82,0x00,0xFF},
|
|
420
|
{ 83,0x00,0xFF},
|
|
421
|
{ 84,0x90,0xFF},
|
|
422
|
{ 85,0x31,0xFF},
|
|
423
|
{ 86,0x00,0xFF},
|
|
424
|
{ 87,0x00,0xFF},
|
|
425
|
{ 88,0x01,0xFF},
|
|
426
|
{ 89,0x00,0xFF},
|
|
427
|
{ 90,0x00,0xFF},
|
|
428
|
{ 91,0x00,0x0F},
|
|
429
|
{ 92,0x00,0x00},
|
|
430
|
{ 93,0x00,0x00},
|
|
431
|
{ 94,0x00,0x00},
|
|
432
|
{255, 0, 0xFF} }; // set page bit to 0
|
|
433
|
//End of file
|
