tcU3VFX3Core.h

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/*
 * tcU3VFX3Core.h
 *
 *  Created on: Oct 13, 2017
 *      Author: mitydsp
 */
 
#ifndef TCU3VFX3CORE_H_
#define TCU3VFX3CORE_H_
 
#include <cstdint>
 
#include <libfpga/fpgaregister.h>
 
class tcU3VFX3Core {
public:
    tcU3VFX3Core(uint32_t anAddress);
    virtual ~tcU3VFX3Core();
 
    uint32_t version();
 
    void reset(bool abReset);
    void enable(bool abEnable);
 
    bool transferError();
 
    void latchTimestamp();
    uint64_t timestamp();
 
    void setFrameSize(uint16_t anX, uint16_t anY);
    void setFrameOffsets(uint16_t anX, uint16_t anY);
 
    void setPixelFormat(uint32_t anPixelFormat);
    void setSIRMTransferSize(uint32_t anTransferSize);
    void setSIRMTransferCount(uint32_t anTransferCount);
    void setSIRMFT1(uint32_t anFT1);
    void setSIRMFT2(uint32_t anFT2);
 
    uint32_t SIRMBytes();
    void setOverrun(bool abSet);
 
    void setBytesPerFrame(uint32_t anNumBytes);
 
    // Requests that the currently running transactions stall.
    void stall(bool abStall);
    bool isStalled();
 
    // Sets a stall between N number of packets for Y number of 100MHz clock cycles.
    void setInterPacketStall(int anNumberOfPackets, int anNumClockCycles);
 
private:
    void setBit(bool abSet, uint32_t anOffset, uint32_t anBit);
 
    tcFPGARegister<uint32_t> mhRegister;
 
    uint32_t mnSirmCount, mnSirmTs, mnSirmFt1, mnSirmFt2;
};
 
#endif /* TCU3VFX3CORE_H_ */