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FPGA MCS Generation

The default output file type from Xilinx ISE is the .bit output type which can be utilized for JTAG FPGA programming. When it is desired to load the FPGA image onto the MityDSP-Pro module the file must be converted to a .mcs file for use with our MityGUI application. Note the last version of ISE that supports the Spartan 3 FPGA family is the 13.X series. Critical Link typically uses 13.2 however it's likely that all 13.x versions will properly support the Spartan 3.

There are two methods of such conversion:

Xilinx Promgen Command Line MCS Generation

XC3S4000 Size FPGA

  1. Ensure Xilinx ISE 13.X (or below) is installed to properly support the Spartan 3 FPGA
  2. Open a windows CMD prompt in Administrator Mode
  3. CD to the ISE install directory and down into the "nt" directory. Example location on our PC shown in the example below:
    c:\Xilinx\13.2\ISE_DS\ISE\bin\nt>
    
  4. Run the "promgen" command as shown in the example below with the name and location of your .bit file in place of "c:\your.bit" and the name and location where you want the MCS file to be placed when created, i.e. c:\your.mcs
    c:\Xilinx\13.2\ISE_DS\ISE\bin\nt>promgen -w -p mcs -u 0 c:\your.bit -o c:\your.mcs
    
  5. Example output of the command being run:
    Release 13.2 - Promgen O.61xd (nt)
    Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
    0x1595d0 (1414608) bytes loaded up from 0x0
    Using generated prom size of 2048K
    Writing file "c:\your.mcs".
    Writing file "c:\your.prm".
    Writing file "c:\your.cfi".
    
  6. You should now be able to use the MCS file generated with MityGUI

Xlinx IMPACT GUI MCS Generation

XC3S4000 Sized FPGA

TBD

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