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3.3V Supply Requirements

The MityDSP-L138F and the MityARM-1808F are powered by an external 3.3 Volt power supply as well as an optional 3 volt RTC battery backup supply. The 3.3V power supply is used to derive several additional voltages on the module. Actual power utilization of these modules is highly dependent on the application and factors such as:

  • CPU clock rate
  • FPGA clock rates (if present)
  • FPGA logic density (if present)
  • CPU Peripheral utilization
  • Utilization of CPU and FPGA power down / low power modes

The following section outlines several use cases and the measured power consumption. It would seem that most designs with SOMS including FPGAs we have encountered consume, typically, between 1 to 2 watts. Critical Link recommends, for power sensitive applications, developers consider assembling a prototype and measuring power consumption with the MityDSP-L138F SOM in a configuration that roughly matches the end application in order to better assess power performance.

Measured 3.3V power draw for various uses

This section attempts to give you a better feel for module power draw under various configurations. The power consumption here includes the entire module, not just the OMAP-L138. It includes the on Module DC to DC converters, power good and FPGA status LEDs , the OMAP or AM1810, the NAND FLASH, SPI FLASH, and miscellaneous crystals, etc.

Module CPU Clock Peripherals Enabled in Kernel ARM Load DSP Load (%) Notes I (mA) Power (mW)
MityDSP-L138 N/A 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP N/A Reset Sleep to Memory TBS TBS
MityDSP-L138 96 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 5% Reset Running Linux 170 561
MityDSP-L138 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 5% Reset Running Linux 230 759
MityDSP-L138 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 100% Reset network I/O test 270 891
MityDSP-L138 456 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 3% Reset Running Linux 250 825
MityDSP-L138 456 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 100% Reset network I/O test 300 990
MityDSP-L138F (LX16) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP 5% Reset Running Linux 300 990
MityDSP-L138F (LX16) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI, Camera 2% Idle Running Linux and GUI Vision Dev Kit No Camera Displayed 325 1063
MityDSP-L138F (LX16) 372 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI, Camera 2% Idle Running Linux and GUI Vision Dev Kit No Camera Displayed 335 1095
MityDSP-L138F (LX16) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI, Camera 54% Bayer Color Conversion DSP Running Linux and GUI Vision Dev Kit 340 1111
MityDSP-L138F (LX16) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI, Camera 95% Idle Running Linux and GUI Vision Dev Kit FPGA Based Grayscale 340 1111
MityDSP-L138 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI 2% Idle Running Linux and Vision Dev Kit GUI with DSP programmed but Idle 310 1013
MityDSP-L138F (A735) 300 MHz N/A 5% Reset uBoot IDLE, FPGA not programmed 210 693
MityDSP-L138F (A735) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI 5% Reset Running Linux, FPGA not Programmed 300 990
MityDSP-L138F (A735) 300 MHz 3 Uarts, SPI, MII, MDIO, RTC, EMIFA, 2xUSB, McASP, DVI 5% Reset Running Linux, FPGA Programmed with Industrial IO reference project, DVI active 310 1023

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