Building FPGA Examples from MDK¶
The MDK https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Board_Support_Package provided includes all of our FPGA cores and other FPGA VDHL example code for your use with our SoM. The example projects are located under \MDK_YYYY-MM-DD\examples\industrial_io\fpga\ with examples provided for both Rev A/B and Rev C (most customers have this rev) development boards. In the \MDK_YYYY-MM-DDD\fpga\ directory of the MDK you will find FPGA VHDL source files as well as pre-compiled cores in the NGC format. Note that the MityDSP_L138_pkg.vhd file contains the templates for using the cores provided.
How to add an example LX16 project to ISE and have a successful build¶
The instructions below are for building the LX16 FPGA that supports the DVI video output of the development board for revision C boards.
- Starting from scratch with the MDK 2014-01-03 freshly extracted and using ISE 14.3
- Open the existing project in ISE from \MDK_2014-01-13\examples\industrial_io\fpga\build_dvi_rev_c\
- When prompted to add files select the "base_module" and navigate to \MDK_2014-01-13\fpga\vhdl\ and select the vhd file. This should populate another 6 or so file locations automatically. Select OK to close the dialog.
- Now use "Add source" to add the gpio.vhd and lcd_serdes_cl000119 files to the project.
- Adding Pre-Build NGC cores
- One way to add the NGC's is to "Add source" and browse the the \MDK_2014-01-13\fpga\core\build_spartan6\ directory and select them (tfp410.gc, i2c.ngc, ads7843.ngc, pwm.ngc and lcd_ctlr.ngc). They should show in your project now a "NG" file identifiers and not '?'s.
- The alternate way to use the NGC's is set your "search directory" -sd option under both "Synthesize-XST" properties and "Implement Design" properties for the project. They are available in the "Advanced" display level. They should both be set to the \MDK_2014-01-13_3\fpga\cores\build_spartan6 directory. If you "add" them this way they will remain as '?'s in your project hierarchy.
- At this time all source files should be part of the project. However confirm from the "Files" tab below the "Processes" dialog on the left side of ISE that the "View association" for all files is shown as at least "Implementation" or "All". Also confirm that the "MityDSP_L138_pkg.vhd" file is shown in this tab as it contains the NGC component/port declarations.
- Note that since the way we provide the cores by providing the NGC and the MityDSP_L138_pkg.vhd" file the .vhd wrappers are not needed for them. In previous versions of ISE the "Locate missing source files" dialog didn't pop up for these "missing" files. When the dialog appears you can select the "Remove unspecified files from the project" and the pop-up will stop occurring and have no impact on the build process.
- At this time you can "Generate Programming File" and it should complete with your .bit file being outputted.
- You then use the bit2bin utility to generate the bin file that can be loaded into the FPGA.
The bottom of this forum post mentions the NGC usage: https://support.criticallink.com/redmine/boards/12/topics/604?r=665#message-665
Building an LX45 based example¶
The LX45 based modules (those with an 'I' in the part number) are not compatible with the DVI display example, only the LCD display example. This is because FPGA balls (F12, E12, D12, C12, F11, E11, E7 and E8) are not "bonded" in the LX45 version and on our development board those pins drive portions of the DVI display signals.
To build an LX45 example you would follow these steps:
- Build the "build_lcd_rev_c" project as-is for the LX16.
- Once that is built (confirm that everything is configured properly) remove the "IndustrialIO_rev_C.ucf" file from the project and add the "IndustrialIO_rev_C_lx45.ucf" to the project. This UCF has the 8 non-bonded balls commented out of the UCF.
- Change the device type for the project properties to "XC6SLX45" and then rebuild the project.
- You should end up with a bit file that is generated for the LX45.
Note that the only difference between the "DVI" and "LCD" projects for the RevC boards is that the "generics" in the Synthesis properties are set for "DISP_CONFIG=LCD" or "DISP_CONFIG=DVI".
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