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Using the TI SDK with MityDSP-L138 and MityARM-1808

Developer's using the MityDSP-L138 or MityARM-1808 platform can use the TI DVSDK framework that is based on the TI arago project. This is a great (and recommended) option if the target application for your board involves using the XDAIS and/or the codec's available from TI for multimedia applications.

In order to use the DVSDK with the MityDSP SoMs, you need to use the linux kernel supplied by Critical Link along with the u-Boot bootloader supplied by Critical Link. These applications are needed in order to deal with the configuration differences between the modules supplied by Critical Link and the EVM platforms that TI develop's their DVSDK on. In addition, if you are using SoMs with integrated FPGA's, you will continue to need the fpga driver modules to support loading FPGA cores, etc.

However, the toolchains, framework, and reference root filesystem included in the DVSDK should work without major modification [see the Notes section below].

Building the DVSDK against the Critical Link Linux Kernel

You need to acquire a copy of the kernel that supports the Critical Link SOMs. A copy of the kernel may be downloaded from our website and is also included in periodic releases of our board support packages. Extract the kernel to a directory, .e.g, /home/user/linux-davinci. Configure the kernel (e.g., make ARCH-arm CROSS_COMPILE=arm-angstrom-linux-gnueabi- mitydspl138_defconfig).

Install the SDK. Edit the top level Rules.make file in locate the LINUXKERNEL_INSTALL_DIR and modify the path to reference the Critical Link kernel. The simply run "make", get a cup of coffee, and when you return you should have an updated set of files. If you have your target file system accessible on your build machine, modify the EXEC_DIR variable in the same path to point to it and run a make install to update the drivers, kernel, etc.

Notes for configuring a MityDSP SoM to work with the DVSDK

The TI Digital Video SDK requires a few changes to the u-boot configuration to work properly.

You will need to:

  • Enable the LCD and declare it as a wvga_800x480 type or other compatible panel (assuming you need video).
  • Enable the MMC (assuming you intend to boot from MMC, see MMC_configuration)
U-Boot > config
MityDSP-L138 Configuration:
Config Version  : 1.0
Config Size     : 264
Manufacturer    : Critical Link
Ethernet Config : 2
Ethernet Name   : GENERIC @ 0x03
Ethernet PHYMask: 8
LCD Config      : 1
   LCD Panel     : wvga_800x480
MMC0 Config     : 1
MMC1 Config     : 0
U-Boot >

This will set up the board correctly from the linux kernel's perspective. You also need to set the kernel boot args properly. This is primarily to allocate
enough RAM to the DSP for it to do the video processing and dsp-link connection. We boot the system from the MMC card in this configuration too, so the
relevant u-boot environment vars are:

bootargs=console=ttyS1,115200n8 noinitrd rw mem=32M@0xc0000000 mem=64M@0xc4000000 root=/dev/mmcblk0p1 rw,rootwait
bootcmd=mmcinfo; ext2load mmc 0:1 c0700000 /boot/uImage; bootm

Below is a sample output from a working L138F based DVI demo setup for reference....

U-Boot > printenv
bootdelay=3
baudrate=115200
flashuboot=tftp 0xc0700000 mityomap/u-boot-ubl.bin; sf probe 0; sf erase 0x10000 0x80000; sf write 0xc0700000 0x10000 ${filesize}
flashkernel=tftp 0xc0700000 mityomap/uImage; sf probe 0; sf erase 0x100000 0x280000; sf write 0xc0700000 0x100000 ${filesize}
flashrootfs=tftp 0xc0000000 mityomap/mityomap-base-mityomapl138.jffs2; nand erase 0 0x08000000; nand write.jffs2 0xc0000000 0 ${filesize}
autoload=no
mtdids=nand0=nand
mtdparts=mtdparts=nand:128M(rootfs),-(userfs)
bootargsbase=mem=96M console=ttyS1,115200n8
flashargs=setenv bootargs ${bootargsbase} ${mtdparts} root=/dev/mtdblock0 rw,noatime rootfstype=jffs2
bootfile=uImage
gatewayip=192.168.174.9
netmask=255.255.0.0
ipaddr=10.0.100.5
serverip=192.168.175.22
dnsip=10.0.0.1
dnsip2=24.92.226.12
bootargs=console=ttyS1,115200n8 noinitrd rw mem=32M@0xc0000000 mem=64M@0xc4000000 root=/dev/mmcblk0p1 rw,rootwait
bootcmd=mmcinfo; ext2load mmc 0:1 c0700000 /boot/uImage; bootm
stdin=serial
stdout=serial
stderr=serial
ethaddr=00:50:c2:bf:88:f7
ver=U-Boot 2009.11-00036-g8ca1198 (Dec 16 2010 - 13:18:23)

Environment size: 1084/65532 bytes
U-Boot >
U-Boot > factoryconfig
Factory Configuration:
Config Version : 1.1
MAC Address    : 00:50:C2:BF:88:F7
Serial Number  : 100634
FPGA Type      : 2 [XC6SLX16]
Part Number    : L138-FG-225-RC

U-Boot > config
MityDSP-L138 Configuration:
Config Version  : 1.0
Config Size     : 264
Manufacturer    : Critical Link
Ethernet Config : 2
Ethernet Name   : GENERIC @ 0x03
Ethernet PHYMask: 8
LCD Config      : 1
   LCD Panel     : wvga_800x480
MMC0 Config     : 1
MMC1 Config     : 0
U-Boot >

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