FPGA Cores¶
The table below outlines the various FPGA cores made available by Critical Link for the MityDSP-L138F family of SOMs. These are provided in our MDK for convenience, as most customers have their own IP they are adding to the FPGA.
This table is updated as cores are tested at Critical Link, and there may not be an MDK/BSP release containing the most recent changes. If you need a "bleeding edge" copy of a core, please contact tom.catalino@criticallink.com. Changes to cores (bug fixes, addition of new features) are documented in the MDK/BSP release notes.
Core/Module | Type | Available Drivers | Test Harness | Documentation |
Base Module | VHDL | linux, DSP/BIOS | TBS | TBS |
I2C | Netlist | linux, DSP/BIOS | TBS | TBS |
LCD Controller | Netlist | linux, DSP/BIOS | TBS | TBS |
QVGA LCD Panel | VHDL | N/A (none required) | TBS | TBS |
WQVGA LCD Panel | VHDL | N/A (none required) | TBS | TBS |
Touch Panel Interface | Netlist | linux | TBS | TBS |
SPI | Netlist | linux, DSP/BIOS | VHDL sim, DSP/BIOS & linux test app | TBS |
GPIO | VHDL | linux, DSP/BIOS | DSP/BIOS & linux test app | The GPIO Core |
UART | Netlist | linux, DSP/BIOS | DSP/BIOS & linux test app | TBS |
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