Project

General

Profile

ARM9 Platforms ยป

Note: For ARM Gpio mapping to FPGA pins, see MityDSP-L138F-Carrier-Board-Design-Guide

Reference the L138 Datasheet for all pinmux possibilities

SOM DDR Edge Connector Pin Desc FPGA LX16/LX45 Pin Desc No FPGA LX16/LX45 Gpio Mux No FPGA Gpio Mux
1 3.3V
3 3.3V
5 3.3V
7 GND
9 GND
11 RESET_IN
13 SATA_TX_P
15 SATA_TX_N
17 SATA_RX_P
19 SATA_RX_N
21 USB0_ID
23 USB1_DN
25 USB1_DP
27 USB0_VBUS
29 USB0_DN
31 USB0_DP
33 USB0_DRVVBUS
35 3V_RTC_BAT
37 3.3V
39 3.3V
41 GND
43 SPI1_MISO GP2_10
45 SPI1_MOSI GP2_11
47 SPI1_ENA GP2_12
49 SPI1_CLK GP2_13
51 SPI1_SCS1 GP2_15
53 SPI1_SCS0 GP2_14
55 I2C0_SCL GP1_5
57 I2C0_SDA GP1_4
59 UART2_TXD GP1_2
61 UART2_RXD GP1_3
63 GND
65 UART1_TXD GP1_0
67 UART1_RXD GP1_1
69 MDIO_CLK GP1_7
71 MDIO_DAT GP1_6
73 MII_RXCLK GP1_8
75 MII_RXDV
77 MII_RXD0 GP8_1
79 MII_RXD1 GP8_2
81 MII_RXD2 GP8_3
83 MII_RXD3 GP8_4
85 GND
87 MII_CRS GP8_5
89 MII_RXER GP8_6
91 FPGA IO_47_P.U17 EMA_CS0 GP2_0
93 FPGA IO_47_N.U18 EMA_OE GP3_10
95 FPGA IO_45_P.T17 EMA_BA0 GP2_8
97 FPGA IO_45_N.T18 EMA_BA1 GP2_9
99 FPGA IO_43_P.P17 EMA_A0 GP5_0
101 FPGA IO_43_N.P18 EMA_A1 GP5_1
103 FPGA IO_41_P.N17 EMA_A2 GP5_2
105 FPGA IO_41_N.N18 EMA_A3 GP5_3
107 GND
109 FPGA IO_39_P.M16 EMA_A4 GP5_4
111 FPGA IO_39_N.M18 EMA_A5 GP5_5
113 FPGA IO_37_P.L17 EMA_A6 GP5_6
115 FPGA IO_37_N.L18 EMA_A7 GP5_7
117 FPGA IO_35_P.K17 EMA_A8 GP5_8
119 FPGA IO_35_N.K18 EMA_A9 GP5_9
121 FPGA IO_33_P.J16 EMA_A10 GP5_10
123 FPGA IO_33_N.J18 EMA_A11 GP5_11
125 FPGA IO_31_P.H16 EMA_A12 GP5_12
127 FPGA IO_31_N.H18 EMA_A13 GP5_13
129 GND
131 FPGA IO_29_P.G16 EMA_D15 GP3_7
133 FPGA IO_29_N.G18 EMA_D14 GP3_6
135 FPGA IO_27_P.F17 EMA_D13 GP3_5
137 FPGA IO_27_N.F18 EMA_D12 GP3_4
139 FPGA IO_25_P.E16 EMA_D11 GP3_3
141 FPGA IO_25_N.E18 EMA_D10 GP3_2
143 FPGA IO_23_P.D17 EMA_D9 GP3_1
145 FPGA IO_23_N.D18 EMA_D8 GP3_0
147 FPGA IO_21_P.C17 EMA_D7 GP4_15
149 FPGA IO_21_N.C18 EMA_D6 GP4_14
151 GND
153 FPGA IO_19_P.B16 EMA_D5 GP4_13
155 FPGA IO_19_N.A16 EMA_D4 GP4_12
157 FPGA IO_17_P.C15 EMA_D3 GP4_11
159 FPGA IO_17_N.A15 EMA_D2 GP4_10
161 FPGA IO_15_P.B14 EMA_D1 GP4_9
163 FPGA IO_15_N.A14 EMA_D0 GP4_8
165 FPGA IO_13_P.C13 EMA_WEN_DQM0 GP2_3
167 FPGA IO_13_N.A13 EMA_WEN_DQM1 GP2_2
169 FPGA IO_11_P.B12 EMA_SDCKE GP2_6
171 FPGA IO_11_N.A12 EMA_CLK GP2_7
173 GND
175 FPGA IO_9_P.B11 EMA_WE GP3_11
177 FPGA IO_9_N.A11 EMA_CAS GP2_4
179 FPGA IO_7_P.C10 EMA_RAS GP2_5
181 FPGA IO_7_N.A10 EMA_CS2 GP3_15
183 FPGA IO_5_P.B9 EMA_CS4 GP3_13
185 FPGA IO_5_N.A9 EMA_CS5 GP3_12
187 FPGA IO_3_P.B8 RESET_OUT GP6_15
189 FPGA IO_3_N.A8 VP_CLKIN3 GP6_2
191 FPGA IO_1_P.C7 VP_CLKOUT3 GP6_1
193 FPGA IO_1_N.A7 LCD_MCLK GP8_10
195 GND
197 VCCO_1 EMA_RNW GP3_9
199 VCCO_1 EMA_CS3 GP3_14
SOM DDR Edge Connector Pin Desc FPGA LX16 Pin Desc No FPGA LX16/LX45 Gpio Mux No FPGA Gpio Mux
2 3.3V
4 3.3V
6 3.3V
8 GND
10 GND
12 EXT_BOOT
14 GP0_7
16 GP0_10
18 GP0_11
20 GP0_15
22 GP0_6
24 GP0_14
26 GP0_12
28 GP0_5
30 GP0_13
32 GP0_1
34 GP0_4
36 GP0_3
38 3.3V
40 3.3V
42 GND
44 GP0_2
46 GP0_0
48 GP0_8
50 GP0_9
52 MMCSD0_DAT7 GP5_14
54 MMCSD0_DAT6 GP5_15
56 MMCSD0_DAT5 GP4_0
58 MMCSD0_DAT4 GP4_1
60 MMCSD0_DAT3 GP4_2
62 MMCSD0_DAT2 GP4_3
64 GND
66 MMCSD0_DAT1 GP4_4
68 MMCSD0_DAT0 GP4_5
70 MMCSD0_CMD GP4_6
72 MMCSD0_CLK GP4_7
74 MII_TXCLK GP1_13
76 MII_TXD3 GP1_11
78 MII_TXD2 GP1_10
80 MII_TXD1 GP1_9
82 MII_TXD0 GP8_7
84 MII_TXEN GP1_14
86 GND
88 MII_COL GP1_12
90 FGPA_SUSPEND NC NC
92 FPGA IO_48_P.M14 UPP_CH1_START GP6_10
94 FPGA IO_48_N.N14 VP_CLKIN1 GP6_6
96 FPGA IO_46_P.N15 UPP_CH1_D15
98 FPGA IO_46_N.N16 UPP_CH1_D14
100 FPGA IO_44_P.L12 UPP_CH1_D13
102 FPGA IO_44_N.L13 UPP_CH1_D12
104 FPGA IO_42_P.K12 UPP_CH1_D11
106 FPGA IO_42_N.K13 UPP_CH1_D10
108 GND
110 FPGA IO_40_P.L15 UPP_CH1_D9
112 FPGA IO_40_N.L16 UPP_CH1_D8
114 FPGA IO_38_P.K15 UPP_CH1_D7
116 FPGA IO_38_N.K16 UPP_CH1_D6
118 FPGA IO_36_P.J13 UPP_CH1_ENABLE GP6_9
120 FPGA IO_36_N.K14 UPP_CH1_D5
122 FPGA IO_34_P.H15 UPP_CH1_D4
124 FPGA IO_34_N.H16 UPP_CH1_D3
126 FPGA IO_32_P.H13 UPP_CH1_D2
128 FPGA IO_32_N.H14 UPP_CH1_WAIT GP6_8
130 GND
132 FPGA IO_30_P.F15 UPP_CH1_D1
134 FPGA IO_30_N.F16 UPP_CH1_D0 GP6_5
136 FPGA IO_28_P.H12 UPP_CH1_CLK GP6_11
138 FPGA IO_28_N.G13 UPP_CH0_ENABLE GP8_13
140 FPGA IO_26_P.F14 VP_CLKOUT2 GP6_3
142 FPGA IO_26_N.G14 VP_CLKIN2 GP6_4
144 FPGA IO_24_P.F13 UPP_CH0_WAIT GP8_12
146 FPGA IO_24_N.E13 UPP_CH0_START GP8_14
148 FPGA IO_22_P.D14 UPP_CH0_CLK GP8_15
150 FPGA IO_22_N.C14 VP_CLKIN0 GP6_7
152 GND
154 FPGA IO_20_P.F12 LCD_D15 GP7_7
156 FPGA IO_20_N.E12 LCD_D14 GP7_6
158 FPGA IO_18_P.D12 LCD_D13 GP7_5
160 FPGA IO_18_N.C12 LCD_D12 GP7_4
162 FPGA IO_16_P.F11 LCD_D11 GP7_3
164 FPGA IO_16_N.E11 LCD_D10 GP7_2
166 FPGA IO_14_P.D11 LCD_D9 GP7_1
168 FPGA IO_14_N.C11 LCD_D8 GP7_0
170 FPGA IO_12_P.E7 LCD_D7 GP7_15
172 FPGA IO_12_N.E8 LCD_D6 GP7_14
174 GND
176 FPGA IO_10_P.D9 LCD_VSYNC GP8_8
178 FPGA IO_10_N.C9 LCD_HSYNC GP8_9
180 FPGA IO_8_P.D8 LCD_D5 GP7_13
182 FPGA IO_8_N.C8 LCD_PCLK GP8_11
184 FPGA IO_6_P.D6 LCD_D4 GP7_12
186 FPGA IO_6_N.C6 LCD_D3 GP7_11
188 FPGA IO_4_P.B6 LCD_D2 GP7_10
190 FPGA IO_4_N.A6 LCD_D1 GP7_9
192 FPGA IO_2_P.C5 LCD_D0 GP7_8
194 FPGA IO_2_N.A5 LCD_AC_ENB_CS GP6_0
196 GND
198 VCCO_0 EMA_WAIT0 GP3_8
200 VCCO_0 EMA_WAIT1 GP2_1

Go to top
Add picture from clipboard (Maximum size: 1 GB)