Contains utility routines for fetching MitySOM-AM57x FPGA IP Core Version data. More...

#include <libfpga/fpgaregister.h>
#include "StatusReporter/StatusReporter.h"
#include <string>

Include dependency graph for MitySOMAM57Version.h:

This graph shows which files directly or indirectly include this file:

Classes
union	corever0

struct	corever0::bits0

union	corever1

struct	corever1::bits1

union	corever2

struct	corever2::bits2

union	corever3

struct	corever3::bits3

struct	coreversion
	This structure holds the MitySOM-AM57X version data. More...

Namespaces
	MitySOMAM57XUtils

Macros
#define	FPGA_BASE_ADDR 0x66000000 /* ARM side interface, CS5 */

#define	FPGA_CORE_SIZE 0x80 /* Core address region */

#define	FPGA_BASEMODULE_OFFSET 0

#define	FPGA_BASEYEAR 2000

Typedefs
typedef union corever0	corever0

typedef union corever1	corever1

typedef union corever2	corever2

typedef union corever3	corever3

Functions
template<class T >
int	MitySOMAM57XUtils::read_core_version (T &regs, struct coreversion *pdata)
	Fetch the MitySOM-AM57x standard core version data from the memory mapped FPAG registers. More...

void	MitySOMAM57XUtils::DumpVersion (std::string pretext, struct coreversion *pdata)
	Dump MitySOM-AM57X version data as a status INFO line. More...

Detailed Description

Contains utility routines for fetching MitySOM-AM57x FPGA IP Core Version data.

Author: Micahel Williamson (mikew.nosp@m.@cri.nosp@m.tical.nosp@m.link.nosp@m..com)

Version: 0.1

Date: 2022-03-15

Copyright: Copyright (c) 2022

Macro Definition Documentation

◆ FPGA_BASE_ADDR

#define FPGA_BASE_ADDR 0x66000000 /* ARM side interface, CS5 */

◆ FPGA_BASEMODULE_OFFSET

#define FPGA_BASEMODULE_OFFSET 0

◆ FPGA_BASEYEAR

#define FPGA_BASEYEAR 2000

◆ FPGA_CORE_SIZE

#define FPGA_CORE_SIZE 0x80 /* Core address region */

Typedef Documentation

◆ corever0

typedef union corever0 corever0

Core Version Register, FIFO_no = 0, MitySOM-AM57X FPGA IP

◆ corever1

typedef union corever1 corever1

Core Version Register, FIFO_no = 1, MitySOM-AM57X FPGA IP

◆ corever2

typedef union corever2 corever2

Core Version Register, FIFO_no = 2, MitySOM-AM57X FPGA IP

◆ corever3

typedef union corever3 corever3

Core Version Register, FIFO_no = 3, MitySOM-AM57X FPGA IP

Classes

Namespaces

Macros

Typedefs

Functions