#include <LvdsToCsi2.h>

Collaboration diagram for tcLvdsToCsi2:

Public Member Functions
	tcLvdsToCsi2 (int anAddress)

virtual	~tcLvdsToCsi2 ()

bool	initialized ()

void	resetCoreLogic (bool en)

void	resetLvdsDeserPLL (bool en)

Protected Member Functions
int	dpa ()

Protected Attributes
tcFPGARegister< uint32_t >	mcReg

Detailed Description

The tcLvdsToCsi2 class manages the conv_5x5 MityCAM IP core, which performs a 5x5 convolution using an X/Y separable kernel. Note the weights must be between 0.0f and 1.9f.

Constructor & Destructor Documentation

◆ tcLvdsToCsi2()

tcLvdsToCsi2::tcLvdsToCsi2 ( int anBaseAddress )

Class constructor.

Parameters

anBaseAddress Physical Address of the core, typically in the 0xFF20xxxx range

◆ ~tcLvdsToCsi2()

tcLvdsToCsi2::~tcLvdsToCsi2 ( )

virtual

Class Destructor

Member Function Documentation

◆ dpa()

int tcLvdsToCsi2::dpa ( )

protected

Perform digital phase alignment.

Returns: 0 on success.

◆ initialized()

bool tcLvdsToCsi2::initialized ( )

Returns: true when unit is correctly initialized

◆ resetCoreLogic()

void tcLvdsToCsi2::resetCoreLogic ( bool en )

If en is true, reset FIFOs, synchronization logic, etc.

◆ resetLvdsDeserPLL()

void tcLvdsToCsi2::resetLvdsDeserPLL ( bool en )

If en is true, reset LVDS deserializer. Note, this will kill clock to much of front end logic (e.g. synchronization).

Member Data Documentation

◆ mcReg

tcFPGARegister<uint32_t> tcLvdsToCsi2::mcReg