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1
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#include <stdio.h>
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2
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#include <stdlib.h>
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3
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#include <stdint.h>
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4
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#include <sys/types.h>
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5
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#include <sys/stat.h>
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6
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#include <fcntl.h>
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7
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#include <unistd.h>
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8
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#include <sys/mman.h>
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9
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#include "fpga.h"
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10
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#include "pin_mux.h"
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11
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#include "upp_reg.h"
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12
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#include <string.h>
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13
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14
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#define DEBUG_UPP 1
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15
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16
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/* definitions for upp tx and rx buffers */
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17
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#define UPP_BUF_SIZE (4096*10)
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18
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void *rx_buf, *tx_buf;
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19
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20
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21
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static int upp_mmap_size, psc1_mmap_size, pinmux_size;
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22
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static uintptr_t upp_base, psc1_base, pinmux_base;
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23
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24
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/* enbale the upp for digital loop back */
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25
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int upp_enable(void)
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26
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{
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27
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int mux_val;
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28
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int reg_stat;
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29
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30
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31
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reg_stat = ( *(uint32_t *)(upp_base+UPPCR) ) = 0;
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32
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printf("loopback register: %#010x\n",reg_stat);
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33
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34
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35
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return 1;
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36
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/* ( *(uint32_t *)(upp_base+UPDBL) )= 0x01;
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37
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reg_stat = ( *(uint32_t *)(upp_base+UPDBL) );
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38
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printf("loopback register: %#010x\n",reg_stat); */
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39
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40
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/* mux_val = ( *(uint32_t *)(upp_base+UPDBL));
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41
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printf("DBL: %#010x\n",mux_val); */
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42
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43
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44
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}
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45
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46
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int upp_reset(void)
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47
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{
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48
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int reg_stat;
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49
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50
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reg_stat = ( *(uint32_t *)(upp_base+UPPCR) );
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51
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printf("upp Control before reset: %#010x\n",reg_stat);
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52
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53
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54
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/* lets clear out EN first */
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55
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( *(uint32_t *)(upp_base+UPPCR) ) = 0;
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56
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/* check the dma active bit */
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57
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while (( *(uint32_t *)(upp_base+UPPCR) ) & 0x00 ){
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58
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usleep(5);
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59
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}
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60
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reg_stat = UPPRESET;
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61
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( *(uint32_t *)(upp_base+UPPCR) ) = reg_stat;
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62
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usleep(100000);
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63
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64
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( *(uint32_t *)(upp_base+UPPCR) ) = 0;
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65
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reg_stat = ( *(uint32_t *)(upp_base+UPPCR) );
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66
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printf("upp Control UPPCR: %#010x\n",reg_stat);
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67
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68
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return 1;
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69
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}
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70
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71
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int upp_config(void)
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72
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{
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73
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int reg_stat;
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74
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75
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reg_stat = 0x02020007;
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76
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( *(uint32_t *)(upp_base+UPCTL) ) = reg_stat;
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77
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reg_stat = ( *(uint32_t *)(upp_base+UPCTL) );
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78
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printf("UPCTL: %#010x\n",reg_stat);
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79
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80
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reg_stat = 0x180020;
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81
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( *(uint32_t *)(upp_base+UPICR) ) = reg_stat;
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82
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reg_stat = ( *(uint32_t *)(upp_base+UPICR) );
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83
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printf("UPICR: %#010x\n",reg_stat);
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84
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85
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/* reg_stat = 0xDEAD; */
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86
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( *(uint32_t *)(upp_base+UPIVR) ) = 0x00;
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87
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reg_stat = ( *(uint32_t *)(upp_base+UPIVR) );
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88
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printf("UPIVR: %#010x\n",reg_stat);
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89
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90
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reg_stat = 0x010100;
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91
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( *(uint32_t *)(upp_base+UPTCR) ) = reg_stat;
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92
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reg_stat = ( *(uint32_t *)(upp_base+UPTCR) );
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93
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printf("UPICR: %#010x\n",reg_stat);
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94
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95
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96
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reg_stat = 0x01000;
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97
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( *(uint32_t *)(upp_base+UPDBL) ) = reg_stat;
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98
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reg_stat = ( *(uint32_t *)(upp_base+UPDBL) );
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99
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#if DEBUG_UPP
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100
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printf("UPDBL: %#010x\n",reg_stat);
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101
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#endif
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102
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103
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104
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( *(uint32_t *)(upp_base+UPIEC) ) = 0xffffffff;
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105
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reg_stat = ( *(uint32_t *)(upp_base+UPIEC) );
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106
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#if DEBUG_UPP
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107
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printf("UPIEC: %#010x\n",reg_stat);
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108
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#endif
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109
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110
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111
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( *(uint32_t *)(upp_base+UPIES) ) = 0x0f0f;
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112
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reg_stat = ( *(uint32_t *)(upp_base+UPIES) );
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113
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#if DEBUG_UPP
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114
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printf("UPIES: %#010x\n",reg_stat);
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115
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#endif
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116
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117
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reg_stat = ( *(uint32_t *)(upp_base+UPISR) );
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118
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#if DEBUG_UPP
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119
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printf("UPISR: %#010x\n",reg_stat);
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120
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#endif
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121
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122
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printf("Wait for interrupt\n\n");
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123
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/* while ( !(*(uint32_t *)(upp_base+UPIER))&& !(*(uint32_t *)(upp_base+UPISR)) )
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124
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usleep(2); */
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125
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126
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/* printf("Interrupt done\n");
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127
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printf("Rx buf\n");
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128
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printf("0x%08x ", *(int *)(rx_buf));
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129
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printf("0x%08x ", *(int *)(rx_buf + 4));
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130
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printf("0x%08x ", *(int *)(rx_buf + 8));
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131
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printf("0x%08x ", *(int *)(rx_buf + 12));
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132
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133
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printf("Tx buf\n");
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134
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printf("0x%08x ", *(int *)(tx_buf));
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135
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printf("0x%08x ", *(int *)(tx_buf + 4));
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136
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printf("0x%08x ", *(int *)(tx_buf + 8));
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137
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printf("0x%08x ", *(int *)(tx_buf + 12)); */
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138
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139
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return 1;
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140
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141
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}
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142
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143
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144
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/* lets map the pinmux registers */
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145
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int upp_pinmux(void)
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146
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{
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147
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int mux_val;
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148
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/*unlock the sysconfig registers */
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149
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mux_val=( *(uint32_t *)(pinmux_base+KICK0R));
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150
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printf("Original KICK0: %#010x\n",mux_val);
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151
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152
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mux_val=( *(uint32_t *)(pinmux_base+KICK1R));
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153
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printf("Original KICK1: %#010x\n",mux_val);
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154
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( *(uint32_t *)(pinmux_base+KICK0R)) = KICK0UL;
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155
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( *(uint32_t *)(pinmux_base+KICK1R)) = KICK1UL;
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156
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mux_val=( *(uint32_t *)(pinmux_base+KICK0R));
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157
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printf("Changed KICK0: %#010x\n",mux_val);
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158
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159
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mux_val=( *(uint32_t *)(pinmux_base+KICK1R));
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160
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printf("Changed KICK1: %#010x\n",mux_val);
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161
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162
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163
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mux_val = ( *(uint32_t *)(pinmux_base+PINMUX13));
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164
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printf("Original PINMUX13: %#010x\n",mux_val);
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165
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mux_val |= REG13;
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166
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(*(uint32_t *)(pinmux_base+PINMUX13))=0x00;
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167
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// (*(uint32_t *)(pinmux_base+PINMUX13))=mux_val;
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168
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mux_val = ( *(uint32_t *)(pinmux_base+PINMUX13));
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169
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printf("PINMUX13: %#010x\n",mux_val);
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170
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(*(uint32_t *)(pinmux_base+PINMUX14))=REG14;
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171
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(*(uint32_t *)(pinmux_base+PINMUX15))=REG15;
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172
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mux_val = ( *(uint32_t *)(pinmux_base+PINMUX15));
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173
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printf("PINMUX15: %#010x\n",mux_val);
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174
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printf("We want to set 15 to: %#010x\n",REG15);
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175
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176
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(*(uint32_t *)(pinmux_base+PINMUX16))=REG16;
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177
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(*(uint32_t *)(pinmux_base+PINMUX17))=REG17;
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178
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(*(uint32_t *)(pinmux_base+PINMUX18))=REG18;
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179
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mux_val = ( *(uint32_t *)(pinmux_base+PINMUX15));
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180
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printf("PINMUX15: %#010x\n",mux_val);
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181
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182
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return 1;
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183
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184
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}
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185
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186
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static int upp_buff_init(void)
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187
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{
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188
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int ret;
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189
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int ps = getpagesize();
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190
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191
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if ( (ret = posix_memalign( &rx_buf, ps, UPP_BUF_SIZE) ) ) {
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192
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perror("Memalign failed");
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193
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return -1;
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194
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}
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195
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196
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if ( (ret = posix_memalign( &tx_buf, ps, UPP_BUF_SIZE) ) ) {
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197
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perror("Memalign failed");
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198
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return -1;
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199
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}
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200
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201
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memset( (void *)tx_buf, 0xab, UPP_BUF_SIZE );
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202
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memset( (void *)rx_buf, 0xDE, UPP_BUF_SIZE );
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203
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204
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#if DEBUG_UPP
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205
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printf("Tx buf addr = 0x%08x (0x%08x)\n", (void *)tx_buf, *(int *)tx_buf);
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206
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printf("Rx buf addr = 0x%08x (0x%08x)\n", (void *)rx_buf, *(int *)rx_buf);
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207
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#endif
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208
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209
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return 0;
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210
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}
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211
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212
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static int set_dma(void)
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213
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{
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214
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215
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int reg_stat;
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216
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217
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/*--------------------------------------------------------------------------
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218
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* UPID0 - Channel A (xmit)
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219
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*--------------------------------------------------------------------------*/
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220
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221
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*(uint32_t *)(upp_base + UPID0) = *(uint32_t *)(tx_buf);
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222
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reg_stat = *(uint32_t *)(upp_base + UPID0);
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223
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#if DEBUG_UPP
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224
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printf("UPID0 = 0x%08x\n", reg_stat);
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225
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#endif
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226
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/*--------------------------------------------------------------------------
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227
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* UPID1 - Channel A (xmit)
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228
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*--------------------------------------------------------------------------*/
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229
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*(uint32_t *)(upp_base + UPID1) = (0x4 << 16 | 0x400);
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230
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reg_stat = *(uint32_t *)(upp_base + UPID1);
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231
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#if DEBUG_UPP
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232
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printf("UPID1 = 0x%08x\n", reg_stat);
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233
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#endif
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234
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/*--------------------------------------------------------------------------
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235
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* UPID2 - Channel A (xmit)
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236
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*--------------------------------------------------------------------------*/
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237
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*(uint32_t *)(upp_base + UPID2) = 0x00000400;
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238
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reg_stat = *(uint32_t *)(upp_base + UPID2);
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239
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#if DEBUG_UPP
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240
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printf("UPID2 = 0x%08x\n", reg_stat);
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241
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#endif
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242
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/*--------------------------------------------------------------------------
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243
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* UPQD0 - Channel B (Rcv)
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244
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*--------------------------------------------------------------------------*/
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245
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*(uint32_t *)(upp_base + UPQD0) = *(uint32_t *)(tx_buf);
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246
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reg_stat = *(uint32_t *)(upp_base + UPQD0);
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247
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#if DEBUG_UPP
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248
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printf("UPQD0 = 0x%08x\n", reg_stat);
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249
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#endif
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250
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251
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/*--------------------------------------------------------------------------
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252
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* UPQD1 - Channel B (Rcv)
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253
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*--------------------------------------------------------------------------*/
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254
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*(uint32_t *)(upp_base + UPQD1) = (0x4 << 16 | 0x400);
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255
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reg_stat = *(uint32_t *)(upp_base + UPQD1);
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256
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#if DEBUG_UPP
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257
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printf("UPQD1 = 0x%08x\n", reg_stat);
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258
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#endif
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259
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260
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/*--------------------------------------------------------------------------
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261
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* UPQD2 - Channel B (Rcv)
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262
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*-------------------------------------------------------------------------*/
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263
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*(uint32_t *)(upp_base + UPQD2) = 0x00000400;
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264
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reg_stat = *(uint32_t *)(upp_base + UPQD2);
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265
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#if DEBUG_UPP
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266
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printf("UPQD2 = 0x%08x\n", reg_stat);
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267
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#endif
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268
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269
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}
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270
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|
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271
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|
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272
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|
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273
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/* lets map the pinmux registers */
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274
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static int upp_mmap_init(void)
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275
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{
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276
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int mem_fd;
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277
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int reg_stat;
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278
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279
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mem_fd = open("/dev/mem", O_RDWR);
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280
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if ( mem_fd < 0){
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281
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printf("failed to open /dev/mem\n");
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282
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return mem_fd;
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283
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}
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284
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/* map the pin mux */
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285
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pinmux_size = getpagesize();
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286
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pinmux_base = (uintptr_t)mmap(0,pinmux_size, PROT_READ|PROT_WRITE,
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287
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MAP_SHARED, mem_fd, SYSBASE);
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288
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if ( pinmux_base == (uintptr_t)MAP_FAILED){
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289
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printf("\n\nupp_base mmap fail!\n\n");
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290
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return -1;
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291
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}
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292
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|
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293
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/* map the uPP */
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294
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upp_mmap_size = getpagesize();
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295
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upp_base = (uintptr_t)mmap(0,upp_mmap_size, PROT_READ|PROT_WRITE,
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296
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MAP_SHARED, mem_fd, UPPBASE);
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297
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if ( upp_base == (uintptr_t)MAP_FAILED){
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298
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printf("\n\nupp_base mmap fail!\n\n");
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299
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return -1;
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300
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}
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|
301
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|
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302
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/* map the Power control module */
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303
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psc1_mmap_size = getpagesize();
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304
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psc1_base = (uintptr_t)mmap(0,psc1_mmap_size, PROT_READ|PROT_WRITE,
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305
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MAP_SHARED, mem_fd, PSC1);
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306
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if ( psc1_base == (uintptr_t)MAP_FAILED){
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307
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printf("\n\nupp_base mmap fail!\n\n");
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308
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return -1;
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309
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}
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|
310
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|
|
311
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close(mem_fd);
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312
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}
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|
313
|
|
|
314
|
|
|
315
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/* lets unmap the pinmux registers */
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316
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static int upp_mmap_deinit(void){
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317
|
|
|
318
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if (munmap( (void *)pinmux_base, pinmux_size) == -1){
|
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319
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printf("\n\n munmap fail\n");
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320
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return -1;
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|
321
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}
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|
322
|
|
|
323
|
|
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324
|
|
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325
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if (munmap( (void *)upp_base, upp_mmap_size) == -1){
|
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326
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printf("\n\n munmap fail\n");
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327
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return -1;
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328
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}
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|
329
|
|
|
330
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if (munmap( (void *)psc1_base, psc1_mmap_size) == -1){
|
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331
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printf("\n\n munmap fail\n");
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332
|
return -1;
|
|
333
|
}
|
|
334
|
|
|
335
|
}
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|
336
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|
|
337
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int main(void)
|
|
338
|
{
|
|
339
|
int fd;
|
|
340
|
char *mem;
|
|
341
|
unsigned short *reg;
|
|
342
|
int i;
|
|
343
|
int id;
|
|
344
|
int reg_stat;
|
|
345
|
unsigned short val;
|
|
346
|
|
|
347
|
|
|
348
|
|
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349
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|
|
350
|
/* map the pinmux registers */
|
|
351
|
upp_mmap_init();
|
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352
|
|
|
353
|
reg_stat = ( *(uint32_t *)(psc1_base));
|
|
354
|
printf("Peripheral Revision is: %#010x\n",reg_stat);
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355
|
|
|
356
|
reg_stat = ( *(uint32_t *)(psc1_base+PSTAT));
|
|
357
|
printf("PSTAT is: %#010x\n",reg_stat);
|
|
358
|
|
|
359
|
reg_stat = 0x03;
|
|
360
|
( *(uint32_t *)(psc1_base+UPPCONTROL))= reg_stat;
|
|
361
|
printf("uPP PSC status: %#010x\n",reg_stat);
|
|
362
|
|
|
363
|
reg_stat = ( *(uint32_t *)(psc1_base+PSCMD));
|
|
364
|
reg_stat &= 0xfffffffc;
|
|
365
|
reg_stat |= 0x03;
|
|
366
|
( *(uint32_t *)(psc1_base+PSCMD))= reg_stat;
|
|
367
|
|
|
368
|
while ( *(uint32_t *)(psc1_base + PSTAT) & 0x01)
|
|
369
|
usleep(2);
|
|
370
|
|
|
371
|
reg_stat = ( *(uint32_t *)(psc1_base+UPPSTATUS));
|
|
372
|
printf("uPP PSC status: %#010x\n",reg_stat);
|
|
373
|
|
|
374
|
|
|
375
|
reg_stat = ( *(uint32_t *)(upp_base) );
|
|
376
|
printf("uPP Peripheral ID register: %#010x\n",reg_stat);
|
|
377
|
|
|
378
|
|
|
379
|
|
|
380
|
/* mux the upp */
|
|
381
|
upp_pinmux();
|
|
382
|
|
|
383
|
/* now enbale upp loopback */
|
|
384
|
/*upp_enable();*/
|
|
385
|
upp_reset();
|
|
386
|
|
|
387
|
/* configure the upp for loopback */
|
|
388
|
upp_config();
|
|
389
|
|
|
390
|
/* setup the upp xmit and rcv buffers */
|
|
391
|
upp_buff_init();
|
|
392
|
|
|
393
|
|
|
394
|
|
|
395
|
/* enable the device */
|
|
396
|
*(uint32_t *)(upp_base + UPPCR) = (0x08);
|
|
397
|
reg_stat = ( *(uint32_t *)(upp_base+UPPCR) );
|
|
398
|
printf("upp Control now: %#010x\n",reg_stat);
|
|
399
|
|
|
400
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS0));
|
|
401
|
printf("Chan I status0: %#010x\n",reg_stat);
|
|
402
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS1));
|
|
403
|
printf("Chan I status1: %#010x\n",reg_stat);
|
|
404
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS2));
|
|
405
|
printf("Chan I status2: %#010x\n",reg_stat);
|
|
406
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS0));
|
|
407
|
printf("Chan Q status0: %#010x\n",reg_stat);
|
|
408
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS1));
|
|
409
|
printf("Chan Q status1: %#010x\n",reg_stat);
|
|
410
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS2));
|
|
411
|
printf("Chan Q status2: %#010x\n",reg_stat);
|
|
412
|
|
|
413
|
/* set the dma transfers */
|
|
414
|
set_dma();
|
|
415
|
|
|
416
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIES));
|
|
417
|
printf("UPIES: %#010x\n",reg_stat);
|
|
418
|
|
|
419
|
/* for (i=0;i<2048;i++){
|
|
420
|
*(tx_buf+i)=i;
|
|
421
|
}*/
|
|
422
|
|
|
423
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIES));
|
|
424
|
printf("UPIES: %#010x\n",reg_stat);
|
|
425
|
|
|
426
|
|
|
427
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS0));
|
|
428
|
printf("Chan I status0: %#010x\n",reg_stat);
|
|
429
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS1));
|
|
430
|
printf("Chan I status1: %#010x\n",reg_stat);
|
|
431
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIS2));
|
|
432
|
printf("Chan I status2: %#010x\n",reg_stat);
|
|
433
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS0));
|
|
434
|
printf("Chan Q status0: %#010x\n",reg_stat);
|
|
435
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS1));
|
|
436
|
printf("Chan Q status1: %#010x\n",reg_stat);
|
|
437
|
reg_stat = ( *(uint32_t *)(psc1_base+UPQS2));
|
|
438
|
printf("Chan Q status2: %#010x\n",reg_stat);
|
|
439
|
|
|
440
|
reg_stat = ( *(uint32_t *)(psc1_base+UPIES));
|
|
441
|
printf("UPIES: %#010x\n",reg_stat);
|
|
442
|
|
|
443
|
|
|
444
|
|
|
445
|
|
|
446
|
/* unmap the pinmux registers */
|
|
447
|
upp_mmap_deinit();
|
|
448
|
|
|
449
|
return EXIT_SUCCESS;
|
|
450
|
}
|
|
451
|
|
