Example Projects¶

Below are the reference projects found in the following repository:

Type	Repo	Branch
Quartus Example Projects	git://support.criticallink.com/home/git/mitysbc-a5-ref.git	pro_26.1_stable

mitysbc-a5e-ref-base¶

This is the base reference design project. It contains the minimum configuration for the HPS to boot Linux with USB support and USB console. The FPGA design contains a sys_id module and input/output PIOs that can be attached to misc IO on the development board. This is a good starting point to extend a design from.

mitysbc-a5e-ref-dma¶

This is the base reference design project with mSGDMAs in the Fabric that can move data to / from the HPS's DDR memory. Further instructions for running this example design can be found here A5E-DMA-Example

mitysbc-a5e-ref-fpga-emif¶

This is the base reference design project with the FPGA EMIF subsystem for reference. This is a useful starting point if you need to access the FPGA's RAM in your design.

mitysbc-a5e-ref-fmc¶

This is the base reference design project with the FMC subsystem, which brings the FMC connector's management signals under software control. This is a useful starting point for bringing up an FMC mezzanine card.

mitysbc-a5e-ref-dp¶

This is the base reference design project with the DisplayPort subsystem, which drives a DisplayPort monitor from a video source in the FPGA fabric. This is a useful starting point for adding a display output to a design.

mitysbc-a5e-ref-qsfp-fabric¶

This is the base reference design project with the QSFP fabric subsystem, which runs a 40 Gigabit Ethernet link from the FPGA fabric to the QSFP+ cage with a packet generator and counters in fabric. This is a useful starting point for bringing up a high speed Ethernet interface.