Example Projects¶

Below are the reference projects found in the following repository:

Type	Repo	Branch
Quartus Example Projects	git://support.criticallink.com/home/git/mitysom-a5e-ref.git	pro_25.3_stable

mitysom-a5e-{mini}-ref-base¶

This is the base reference design project. It contains the minimum configuration for the HPS to boot Linux with USB support and USB console. The FPGA design contains a sys_id module and input/output PIOs that can be attached to misc IO on the development board. This is a good starting point to extend a design from.

mitysom-a5e-{mini}-ref-dma¶

This is the base reference design project with mSGDMAs in the Fabric that can move data to / from the HPS's DDR memory. Further instructions for running this example design can be found here A5E-DMA-Example

mitysom-a5e-pcie-gen3x4-rp¶

This is a reference design for the MitySOM-A5 Development kit to run the m.2 M-Key (NVME) in PCIe Gen 3x4 lane root port data mode in order to support reading / writing NVME cards or other PCIe devices that can be inserted into the m.2 M-Key interface.

mitysom-a5e-pcie-gen4x4-rp¶

This is a reference design for the MitySOM-A5 Development kit to run the m.2 M-Key (NVME) in PCIe Gen 4x4 lane root port data mode in order to support reading / writing NVME cards or other PCIe devices that can be inserted into the m.2 M-Key interface. This project requires a speed grade 4 or better MitySOM-A5 device.

mitysom-a5e-pcie-gen3x1-rp¶

This is a reference design for the MitySOM-A5 Development kit to run the m.2 E-Key (wifi) in PCIe Gen 3x1 lane root port data mode in order to support reading / writing wifi cards or other PCIe devices that can be inserted into the m.2 E-Key interface.

mitysom-a5e-pcie-gen3x4-ep¶

This is a reference design for the MitySOM-A5 Development kit to support interfacing with a HOST PC running linux via the PCIe edge connector interface using a Samtec PCIe x4 style riser cable.