Instances of this class handle configuring, and enabling the MityDSP Pulse Width Modulator core I/O interface. More...
#include <core/DspPwm.h>
Public Member Functions | |
tcDspPwm (void *apAddress, tcDspPwmConfig *=NULL) | |
This constructor is used to open a PWM core instance. | |
~tcDspPwm () | |
Default destructor. | |
void | Enable (bool Enable) |
Enable PWM Core (top level enable, for all pulses). | |
void | SetMode (bool IsContinuous) |
Configure PWM Operating Mode. | |
void | SetTrigger (bool IsExternalTriggered) |
Configure PWM Trigger Mode. | |
int | EnableInterrupt (bool Enable, SEM_Handle *apHandle=NULL) |
Configure the PWM Core to generate interrupts on Fixed Cycle (or one shot) completion. | |
void | ClearFC (void) |
Utility function to clear the Fixed Cycle Completion bit. | |
unsigned int | ConfigurePulse (unsigned int Pulse, unsigned short Delay, unsigned short OnTime, unsigned short Period) |
Pulse Configuration. | |
void | EnablePulse (unsigned int Pulse, bool Enabled) |
Enable Specified PWM Pulse. | |
int | SetTotalClockDivisor (unsigned int Divisor) |
Configure the input clock division length. | |
int | SetFixedCycleDuration (unsigned int NumCycles) |
Set the runtime for fixed-cycle or one-shot mode of operation. | |
bool | IsEnabled (void) |
Check if PWM Core is enabled. | |
bool | IsContinuous (void) |
Check if PWM Core is configured for continuous pulse operation. | |
bool | IsExtTriggered (void) |
Check if PWM Core is configured for external trigger operation. | |
bool | IsIntEnabled (void) |
Check if PWM Core has fixed cycle interrupts enabled. | |
bool | IsFixedCycleComplete (void) |
Check if PWM Fixed Cycle complete flag is set. | |
int | GetPulseConfig (unsigned int Pulse, unsigned short &Delay, unsigned short &OnTime, unsigned short &Period) |
Gathers pulse configuration parameters from the PWM Core Module. | |
bool | IsPulseEnabled (unsigned int Pulse) |
Checks whether a specified pulse ID is enabled. | |
unsigned int | GetTotalClockDivisor (void) |
Retrieve the input clock division length. | |
unsigned int | GetFixedCycleDuration (void) |
Returns the runtime for fixed-cycle or one-shot mode of operation. | |
Static Public Member Functions | |
static int | interrupt_dispatch (Arg arMyObject) |
Static interrupt dispatch routine. | |
Public Attributes | |
unsigned int | mnInterruptCount |
ISR counter (useful for debug). | |
Protected Member Functions | |
void | pwmInterrupt (void) |
Interrupt service routine for the PWM core. | |
Protected Attributes | |
SEM_Handle * | mpMySemaphore |
Pointer to registered semaphores. | |
volatile unsigned int * | mpMyBaseReg |
PWM Core base register. | |
unsigned short | mnMyIntMask |
PWM Core interrupt mask. | |
int | mnMyIntLevel |
PWM Core interrupt level. | |
int | mnMyIntVector |
PWM Core interrupt vector. | |
Static Protected Attributes | |
static const int | gnVerOffset = 0 |
Version Register Offset. | |
static const int | gnCsrOffset = 1 |
Control / Status Register Offset. | |
static const int | gnCdrOffset = 2 |
Cycle Duration Register Offset. | |
static const int | gnPulseOffset = 3 |
offset to first pulse register | |
static const int | gnPulseSize = 3 |
num registers per pulse | |
static const int | gnDROffset = 0 |
offset to DR from PulseOffset | |
static const int | gnCROffset = 1 |
offset to DR from PulseOffset | |
static const int | gnPROffset = 2 |
offset to DR from PulseOffset |
Instances of this class handle configuring, and enabling the MityDSP Pulse Width Modulator core I/O interface.
Each PWM Core provides for up 5 configurable pulses to be generated/controlled. The routing of the pulse outputs (and optional input trigger) are application specific. See the application FPGA hardware design notes for further information.
The PWM tcDspPwm module does provide an interrupt interface when used in fixed cycle / one-shot mode. The ISR notifies the application via a counting semaphore.
tcDspPwm::tcDspPwm | ( | void * | apAddress, | |
tcDspPwmConfig * | apConfig = NULL | |||
) |
This constructor is used to open a PWM core instance.
The base address and default configuration data are provided.
[in] | apAddress | The base address of the GPIO core. |
[in] | apConfig | The configuration structure (optional). |
tcDspPwm::~tcDspPwm | ( | ) |
Default destructor.
int tcDspPwm::interrupt_dispatch | ( | Arg | ahMyObject | ) | [static] |
Static interrupt dispatch routine.
Required because of the hidden this pointer associated with a member function, which cannot be passed directly to the interrupt dispatcher.
[in] | ahMyObject | The "this->" pointer for the instance of tcDspGpio associated with this ISR. |
void tcDspPwm::Enable | ( | bool | Enable | ) |
Enable PWM Core (top level enable, for all pulses).
[in] | Enable | When true, core pulse generation is enabled. |
void tcDspPwm::SetMode | ( | bool | IsContinuous | ) |
Configure PWM Operating Mode.
[in] | IsContinuous | When true the core will generate continuous pulse trains (after initial delay conditions are met). When false, core will run until fixed cycle duration has expired. |
void tcDspPwm::SetTrigger | ( | bool | IsExternalTriggered | ) |
Configure PWM Trigger Mode.
[in] | IsExternalTriggered | When true, the core will be configured to start generating pulses when a rising edge is seen on the provided external trigger port of the core. When false, the core will generate pulses immediately (given it is enabled). |
int tcDspPwm::EnableInterrupt | ( | bool | Enable, | |
SEM_Handle * | apHandle = NULL | |||
) |
Configure the PWM Core to generate interrupts on Fixed Cycle (or one shot) completion.
[in] | Enable | When true, interrupts on Fixed Cycle completion are enabled. |
[in] | apHandle | When Enable is true, the apHandle semaphore will be incremented by the PWM interrupt handler. When enable is false, this parameter is ignored. If the apHandle is NULL, no change will be made to the handler. |
void tcDspPwm::ClearFC | ( | void | ) |
Utility function to clear the Fixed Cycle Completion bit.
If interrupts are enabled, the FC bit is automatically cleared by the ISR Routine. This is provided to the user for polled applications only.
unsigned int tcDspPwm::ConfigurePulse | ( | unsigned int | Pulse, | |
unsigned short | Delay, | |||
unsigned short | OnTime, | |||
unsigned short | Period | |||
) |
Pulse Configuration.
This method allows for configuration of the pulse generator parameters.
[in] | Pulse | Pulse to configure. Range 0 to DSP_PWM_NUMPULSES-1 |
[in] | Delay | Number of divided clocks to delay initial Pulse Period following trigger event |
[in] | OnTime | Number of divided clocks to enable pulse |
[in] | Period | Number of divided clocks to repeat Pulse Period |
void tcDspPwm::EnablePulse | ( | unsigned int | Pulse, | |
bool | Enable | |||
) |
Enable Specified PWM Pulse.
[in] | Pulse | Pulse to configure. Range 0 to DSP_PWM_NUMPULSES-1 |
[in] | Enable | When true pulse will be enabled. |
int tcDspPwm::SetTotalClockDivisor | ( | unsigned int | Divisor | ) |
Configure the input clock division length.
This routine allows tuning of the effective pulse width frequency clock as a function of the core input clock. E.G., with an input clock of 25 Mhz, a divisor setting of 25 will result in 1 usec increments for all of the pulse settings.
[in] | Divisor | Pulse to configure. Range DSP_PWM_MINCLOCKCYCLES to DSP_PWM_MINCLOCKCYCLES+15. (currently 18 to 33) |
int tcDspPwm::SetFixedCycleDuration | ( | unsigned int | NumCycles | ) |
Set the runtime for fixed-cycle or one-shot mode of operation.
[in] | NumCycles | The number of cycles to run before FC bit is set. Range from 0 to DSP_PWM_MAXDURATION. |
bool tcDspPwm::IsEnabled | ( | void | ) |
Check if PWM Core is enabled.
bool tcDspPwm::IsContinuous | ( | void | ) |
Check if PWM Core is configured for continuous pulse operation.
bool tcDspPwm::IsExtTriggered | ( | void | ) |
Check if PWM Core is configured for external trigger operation.
bool tcDspPwm::IsIntEnabled | ( | void | ) |
Check if PWM Core has fixed cycle interrupts enabled.
bool tcDspPwm::IsFixedCycleComplete | ( | void | ) |
Check if PWM Fixed Cycle complete flag is set.
int tcDspPwm::GetPulseConfig | ( | unsigned int | Pulse, | |
unsigned short & | Delay, | |||
unsigned short & | OnTime, | |||
unsigned short & | Period | |||
) |
Gathers pulse configuration parameters from the PWM Core Module.
[in] | Pulse | The Pulse to query, 0 to DSP_PWM_NUMPULSES-1 |
[out] | Delay | The delay configured for the pulse |
[out] | OnTime | The OnTime configured for the pulse |
[out] | Period | The Period configured for the pulse |
bool tcDspPwm::IsPulseEnabled | ( | unsigned int | Pulse | ) |
Checks whether a specified pulse ID is enabled.
[in] | Pulse | Pulse ID to check. |
unsigned int tcDspPwm::GetTotalClockDivisor | ( | void | ) |
Retrieve the input clock division length.
This routine returns the effective pulse width frequency clock as a function of the core input clock. E.g., with an input clock of 25 Mhz, a divisor setting of 25 will result in 1 usec increments for all of the pulse settings.
unsigned int tcDspPwm::GetFixedCycleDuration | ( | void | ) |
Returns the runtime for fixed-cycle or one-shot mode of operation.
void tcDspPwm::pwmInterrupt | ( | void | ) | [protected] |
Interrupt service routine for the PWM core.
The ISR reads and clears any pending interrupts. If a semaphore associated has been registered, the ISR increments the semaphore value.
"Interrupt-ness" is taken care of by the 'dispatcher' in DSP/BIOS. Installed by the constructor.
unsigned int MityDSP::tcDspPwm::mnInterruptCount |
ISR counter (useful for debug).
SEM_Handle* MityDSP::tcDspPwm::mpMySemaphore [protected] |
Pointer to registered semaphores.
volatile unsigned int* MityDSP::tcDspPwm::mpMyBaseReg [protected] |
PWM Core base register.
unsigned short MityDSP::tcDspPwm::mnMyIntMask [protected] |
PWM Core interrupt mask.
int MityDSP::tcDspPwm::mnMyIntLevel [protected] |
PWM Core interrupt level.
int MityDSP::tcDspPwm::mnMyIntVector [protected] |
PWM Core interrupt vector.
const int MityDSP::tcDspPwm::gnVerOffset = 0 [static, protected] |
Version Register Offset.
const int MityDSP::tcDspPwm::gnCsrOffset = 1 [static, protected] |
Control / Status Register Offset.
const int MityDSP::tcDspPwm::gnCdrOffset = 2 [static, protected] |
Cycle Duration Register Offset.
const int MityDSP::tcDspPwm::gnPulseOffset = 3 [static, protected] |
offset to first pulse register
const int MityDSP::tcDspPwm::gnPulseSize = 3 [static, protected] |
num registers per pulse
const int MityDSP::tcDspPwm::gnDROffset = 0 [static, protected] |
offset to DR from PulseOffset
const int MityDSP::tcDspPwm::gnCROffset = 1 [static, protected] |
offset to DR from PulseOffset
const int MityDSP::tcDspPwm::gnPROffset = 2 [static, protected] |
offset to DR from PulseOffset