Critical Link MityCam SoC Firmware
1.0
Critical Link MityCam SoC Firmware
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This file contains the implementation for the Lattice MIPI SPI interface class. More...
Macros | |
#define | REG_MAGIC_OFFSET 0 |
#define | REG_CTRL_OFFSET 1 |
#define | REG_VER_OFFSET 2 |
#define | REG_NUM_LANES_OFFSET 3 |
#define | REG_MAGIC 0xDE |
#define | REG_CTRL_BIT_SRST (1<<0) |
#define | REG_CTRL_BIT_DPHY_PD (1<<1) |
#define | REG_CTRL_BIT_DPHY_SRST (1<<2) |
#define | REG_CTRL_BIT_RST_BYTE_FR (1<<3) |
#define | REG_CTRL_BIT_RST_BYTE (1<<4) |
#define | REG_CTRL_BIT_PRBSEN (1<<5) |
This file contains the implementation for the Lattice MIPI SPI interface class.
#define REG_CTRL_BIT_DPHY_PD (1<<1) |
#define REG_CTRL_BIT_DPHY_SRST (1<<2) |
#define REG_CTRL_BIT_PRBSEN (1<<5) |
#define REG_CTRL_BIT_RST_BYTE (1<<4) |
#define REG_CTRL_BIT_RST_BYTE_FR (1<<3) |
#define REG_CTRL_BIT_SRST (1<<0) |
#define REG_CTRL_OFFSET 1 |
#define REG_MAGIC 0xDE |
#define REG_MAGIC_OFFSET 0 |
#define REG_NUM_LANES_OFFSET 3 |
#define REG_VER_OFFSET 2 |