1
|
/*************************************************************
|
2
|
* FPGA INTERFACE.CPP
|
3
|
* AUTHOR: Michele Canepa
|
4
|
* Description: Interface to data in fpga buffers.
|
5
|
*************************************************************/
|
6
|
#include <stdio.h>
|
7
|
#include <cstdio>
|
8
|
#include <string.h>
|
9
|
#include <std.h>
|
10
|
#include <math.h>
|
11
|
#include <clk.h>
|
12
|
// DSP/BIOS LINK Headers
|
13
|
#include <dsplink.h>
|
14
|
#include <failure.h>
|
15
|
#include <notify.h>
|
16
|
#include <bcache.h>
|
17
|
//Critical Link Headers
|
18
|
#include "core/DspFirmware.h"
|
19
|
#include "core/DspIntDispatch.h"
|
20
|
#include "core/DspFpgaGpio.h"
|
21
|
#include "core/DspQDMA.h"
|
22
|
//Custom Headers
|
23
|
#include "arm_interface.h"
|
24
|
#include "fpga_config.h"
|
25
|
#include "fpga_interface.h"
|
26
|
|
27
|
//#define DMA
|
28
|
// FILEID is used by SET_FAILURE_REASON macro.
|
29
|
|
30
|
using namespace MityDSP;
|
31
|
|
32
|
/*************************************************************
|
33
|
FPGA Initialization Routine
|
34
|
*************************************************************/
|
35
|
void fpga_init_tsk()
|
36
|
{
|
37
|
|
38
|
int r1 = tcDspInterruptDispatch::set_hw_interrupt_level(1,10);
|
39
|
|
40
|
tcDspFirmware::set_firmware_base((void*)FPGA_BASE_ADDR);
|
41
|
|
42
|
tcDspFpgaGpio *EofNew = new tcDspFpgaGpio((void*)0x66000080);
|
43
|
|
44
|
int num_channels = 4;
|
45
|
int rconf,isrconf = -1;
|
46
|
|
47
|
for (int i = 0; i< num_channels*2;i++){
|
48
|
rconf=EofNew->ConfigurePin(0,i,false,0,true,false);
|
49
|
isrconf= EofNew->SetISRCallback(0,i,EOFISR,NULL);
|
50
|
}
|
51
|
}
|
52
|
|
53
|
|
54
|
/*************************************************************
|
55
|
End of Frame Interrupt Routine
|
56
|
*************************************************************/
|
57
|
|
58
|
void EOFISR(tcGpio *apThis, unsigned int Bank, unsigned int Offset, void *apUser)
|
59
|
{
|
60
|
// Calculate Channel Number and whether the buffer is ping or pong.
|
61
|
int Ping = Offset % 2;
|
62
|
int ChannelNumber = ((Offset - Ping) >>1 );
|
63
|
|
64
|
//Don't care
|
65
|
int idMeas = 0;
|
66
|
|
67
|
//Pointer to fpga data.
|
68
|
unsigned short *DataStart;
|
69
|
|
70
|
//Depth of the Ping+Pong Buffers
|
71
|
int frameDepth = 1024;
|
72
|
|
73
|
int k,j=0;
|
74
|
|
75
|
Uint32 infoToArm = 0;
|
76
|
|
77
|
if (measureConfigurations.measConfs[idMeas].resolution == 16)
|
78
|
{
|
79
|
//Data buffers are contiguous.
|
80
|
DataStart = (unsigned short *)(MEM_CH0 + (ChannelNumber* CHANNEL_OFFSET*sizeof(unsigned short)) + (Ping*frameDepth/2)*sizeof(unsigned short));
|
81
|
|
82
|
// DMA is not tested yet...
|
83
|
#ifdef DMA
|
84
|
|
85
|
BCACHE_wbInvAll();
|
86
|
tcDspQDMA::GetInstance()->BlockTransfer(NULL,
|
87
|
(void*)DataStart,
|
88
|
(void*)measureBlocks.measureBlock[ChannelNumber][0].block,
|
89
|
frameDepth/4,
|
90
|
EDMA_OPT_ESIZE_32BIT,
|
91
|
EDMA_OPT_PRI_HIGH);
|
92
|
#else
|
93
|
|
94
|
// This is the call that copies wrong.
|
95
|
//memcpy(measureBlocks.measureBlock[ChannelNumber][0].block,DataStart,frameDepth);
|
96
|
|
97
|
// This call is a temporary workaround
|
98
|
#pragma MUST_ITERATE(512,512)
|
99
|
for (k=0;k<512;k++){
|
100
|
do{
|
101
|
*((unsigned short *)measureBlocks.measureBlock[ChannelNumber][0].block +k)=*(DataStart +k);
|
102
|
}while(*((unsigned short *)measureBlocks.measureBlock[ChannelNumber][0].block +k)!=*(DataStart +k));
|
103
|
}
|
104
|
|
105
|
BCACHE_wbInvAll();
|
106
|
|
107
|
|
108
|
#endif
|
109
|
|
110
|
}
|
111
|
|
112
|
//Now I notify to ARM Channel and Measure ID.
|
113
|
idMeas = idMeas << 16;
|
114
|
infoToArm = ChannelNumber | idMeas;
|
115
|
NOTIFY_notify(ID_GPP,0,5,infoToArm);
|
116
|
}
|
117
|
|