Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

Hello,

We are developing on the MityDSP-L138F platform and have noticed an intermittent issue with the I2C bus hanging due to SDA being held LOW. We are uncertain whether it is a slave or the OMAP I2C Module pulling SDA low.

We are using I2C0 (soon to switch everything to I2C1). The issue can be faithfully reproduced if we lower the pull-up resistors below ~1.2kOhm or above a large value (timing, VIH VIL issues). However, it does seem to still occur at random. Shorting SDA to HIGH (5V) resolves the issue and the bus continues operation.

Our question: is there a way to either soft reset the I2C Module via the ICMDR IRS bit == 0, or to manually send 9 CLK pulses on SCLK? We have perused the board support package but cannot see a clear way to directly command the I2C SCLK pin. Is there a simple way to MUX the pin to GPIO and toggle it 9 times? We have also found the ICMDR and ICIVR byte addresses (0x01C2 2024, 0x01C2 2028) but we're unsure how to directly read/write to these.

Thanks for the support, and let us know if we can provide any additional info regarding this issue.

Best,

Jon Cox
Genus IntelliGen