FPGA load causes reboot
Added by Scott Whitney about 13 years ago
Hello,
We just got a new mityDSP l138 with the lx45 FPGA. When I try downloading my fpga build via jtag it fails. I get a Programming terminated DONE did not go high error in impact. When this happens the ARM reboots. Any ideas on the problem? thanks, Scott
Replies (7)
RE: FPGA load causes reboot - Added by Michael Williamson about 13 years ago
Hi Scott,
Have you confirmed your image works on other MityDSP-L138F with lx56 FPGA modules or is this a new FPGA design? If it is the former, we can send some test .bit images to confirm a hardware problem. If it is the latter, you might want to double check your programming options and make sure you aren't driving unused I/O pins high or low on the module (they should be floating, but the ISE tool typically defaults them the pulled low, I believe). There are a bunch of connections between the FPGA and the processor (e.g., NMI, interrupts, EMIFA connections, etc) that if not setup correction could cause you troubles. If you cause the ARM to reboot, it will whack the init PIN on the FPGA during reset.
I assume the JTAG programmer detects the Xilinx part, right?
-Mike
RE: FPGA load causes reboot - Added by Scott Whitney about 13 years ago
Mike,
Thanks for the quick reply. this is the only lx45 board in house now. I think we are expecting a few more to come in shortly. This is a new design. We have an lx16 and our designer took this design and stripped most of it out so I could develope the uPP driver in linux. I then loaded up the lx16 build and loaded it on the smaller board to verify the impact settings were correct. The programmer does detect the correct part. Could you send me a test .bit file? thanks, Scott
RE: FPGA load causes reboot - Added by Scott Whitney about 13 years ago
Mike,
I had our fpga designer rebuild our smaller (uPP interface) build that we were running the lx16 and retarget it for the xl45. It was able to download the design successfully, but very shortly afterwords the ARM crashes.
RE: FPGA load causes reboot - Added by Michael Williamson about 13 years ago
Can you post what the ARM console sees when it crashes? You are downloading via JTAG, correct?
Is the ARM running the UPP when it dies, or is the FPGA basically idle?
-Mike
RE: FPGA load causes reboot - Added by Scott Whitney about 13 years ago
Mike,
The arm is idle when it dies. I will post some captured text. It looks like it can't access the flash memory. We are downloading via jtag.
| arm_crash.txt (128 KB) arm_crash.txt |
RE: FPGA load causes reboot - Added by Michael Williamson about 13 years ago
Scott,
My suspicion is that the pins tied to the EMIFA (a chip select line, a wait line, or perhaps the data lines) are being driving when they shouldn't be. I would double check your bitstream configuration options for unused IOBs, and also double check your EMIFA interface logic.
Here is an image we use for LX45 testing on our testfixture card (not the same as the dev-kit). It configures all of the pins (except for the EMIFA interface pins) as GPIO's, for the most part. They should default to inputs (tristated). I think it should load safely on an Indusitrial I/O board and not corrupt the NAND interface.
-Mike
| mitydsp_l138f_top.bit (1.42 MB) mitydsp_l138f_top.bit | bit file for IMPACT | ||
| MityDSP-L138F-LX45.bin (1.42 MB) MityDSP-L138F-LX45.bin | bin file for loading with drivers or via UBOOT. |
RE: FPGA load causes reboot - Added by Scott Whitney about 13 years ago
Mike,
Your .bin file loaded up fine. I had the designer look at the build, and he had some IO not constrained corectly. I think it might have been to the EMIFA interface. He has fixed that and I was able to load up the build and access data through our uPP interface. Thanks for your help, Scott
