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Pin-muxing SPI

Added by Eric Nelson 10 months ago

Hi all,

We'd like to make use of the SPI peripheral on the MitySOM-5CSx with at least two different chip-selects.

Is the use of the highlighted pins (SPIM0_SS0/SS1) the right approach?

I've worked with other SPI controller drivers that are happier using arbitrary GPIO pins for this.

I'm new to this SoC and haven't yet walked the process of setting up these pin. My understanding is that the
pin muxing is done in the preloader before U-Boot is loaded.

Is that correct?

Thanks in advance for any pointers.

spi-pins.png (120 KB) spi-pins.png Pin muxing selections

Replies (3)

RE: Pin-muxing SPI - Added by Mike Fiorenza 10 months ago

Hi Eric,

Your assumptions are correct. To use the hard HPS SPI peripheral, you would use the signals you have highlighted in the attached image.
You could also not use the hard HPS SPI peripheral, and add a SPI controller into the FPGA which would then let you leverage other FPGA pins if desired (more complicated approach). But for a typical SPI interface, we would recommend using the hard HPS SPI peripheral as you described.

The pin muxing is done as you described. You have to set up the peripherals in your Quartus project which will set up the pin muxing that the preloader uses.

- Mike

RE: Pin-muxing SPI - Added by Eric Nelson 10 months ago

Thanks Mike.

In case it's useful to someone else, I saw that the driver supports the use of arbitrary GPIO pins
.

I also found the SPI controller register map here.

RE: Pin-muxing SPI - Added by Mike Fiorenza 10 months ago

Eric,

Thanks for sharing! I wasn't sure if it supported arbitrary GPIO pins or not. Good to know!

- Mike

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