MitySOM-5CSx Altera Cyclone V SOC Wiki Page¶
- MitySOM-5CSx Altera Cyclone V SOC Wiki Page
- Development Status
- Repositories
- Pre-Built Binaries
- Build Flow
- System Design
- Software
- FPGA / VHDL
- Hardware Design
- OpenCL Support
- Frequently Asked Questions
- Example Projects
- Reference Material
Support is included for the MityARM-5CSx. See The MityDSP website for top level summaries of this platform.
- MitySOM-5CSX DataSheet [pdf]
- MitySOM-5CSX Carrier Board Design Guide [pdf]
- MitySOM-5CSX Development Kit Base Board Wiki
Errata and Product Change Notifications for the MitySOM-5CSX can be found in the Hardware Design section of this wiki.
Development Status¶
Please refer to the MitySOM-5CSX Development Status page for module testing progress.
Repositories¶
The following are links to the repositories that Critical Link provides for the kernel, u-boot, yocto, and sample project.
| Type | Repo | Branch |
| Kernel | git://support.criticallink.com/home/git/linux-socfpga.git | socfpga-3.16 |
| U-Boot | git://support.criticallink.com/home/git/u-boot-socfpga.git | socfpga_v2013.01.01 |
| Yocto Layer | git://support.criticallink.com/home/git/meta-mitysom-5csx.git | dora |
| 5CSE Project (Quartus 14.0) | git://support.criticallink.com/home/git/mitysom-5cs/mitysom_5cse_dev_board.git | master |
| 5CSX Project (Quartus 14.0) | git://support.criticallink.com/home/git/mitysom-5cs/mitysom_5csx_dev_board.git | master |
Pre-Built Binaries¶
The following are links to pre-built binaries for the development SD card image for each SOM. Each also includes each built versions of the preloader, uboot, and root filesystem for each image.
Linux toolchain: https://support.criticallink.com/redmine/attachments/download/9462/poky-eglibc-x86_64-mitysom-5csx-dev-kit-cortexa9hf-vfp-neon-toolchain-1.5.4.sh
Build Flow¶
- Building U-Boot and Preloader
- Building the Linux Kernel
- Building the Root Filesystem using Yocto
- Building SD Card Image
- Building Applications for MitySOM-5CSx using Eclipse and Yocto
System Design¶
Software¶
- Altera_Preloader_Wiki
- Installing Quartus II 13.0sp1 on Xubuntu 12.04
- Linux Build Virtual Machine
- JTAG Debug Interface
- SoM Temperature Sensor
- Building out-of-tree Kernel Modules
- Utilizing QSPI NOR Memory
U-Boot¶
- Overview of U-Boot on the MitySOM-5CSX
- Building_u-Boot_and_Preloader
- Programming the FPGA Through U-Boot
- Accessing FPGA Peripherals
Linux Operating System¶
- Yocto Starter Guide - Linux Root File System
- MitySOM-5CSX Yocto Build Instructions
- Linux Kernel
- Programming the FPGA
- Setting Static IP Address
- Hard setting RNDIS MAC address
- Setting up a RAM file system
- Yocto with Qt5
- Using embedded Qt with QtCreator
FPGA / VHDL¶
- FPGA Overview
- Build a Quartus Project
- Important Note about FPGA/HPS SDRAM Bridge
- Programming FPGA over JTAG
- Upgrading 13.0sp1 projects to 13.1
- FPGA direct DDR memory
- Remote SignalTap
Hardware Design¶
- Errata and Module Product Change Notifications
- On-Module USB Transceiver Information
- Power Supply Requirements
- Mounting Hole Locations
- Heat Dissipation
- Hardware Design Guidelines
- CAD Files and Information
- Clearance Beneath Module
- On-Module Trace Lengths
- MXM Connector Information
- MitySOM-5CSx Pin-Out Spreadsheet
- Ethernet Throughput
OpenCL Support¶
Frequently Asked Questions¶
Example Projects¶
Reference Material¶
A large portion of the software has been developed using information from the sites listed below:
Updated 9 months ago by Alexander Block
Recent Updates:
