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12/22/2023

• Heat Dissipation

11/01/2023

• Utilizing QSPI NOR Memory

10/27/2023

• System Design Overview

05/03/2023

• Building fs 181

03/10/2023

• Errata and Module Product Change Notifications
• Wiki

02/14/2023

• Building kernel 181

01/25/2023

• Programming the FPGA

11/30/2022

• Building Different Kernel Versions

08/01/2022

• Building U-Boot and Pre-loader 2019

06/14/2022

• Linux Build Virtual Machine
• U-Boot on the MitySOM-5CSX

12/13/2021

• MXM Connector Information

02/04/2021

• Building SD Card Image

01/13/2021

• Building the FreeRTOS Demo Project for MitySOM-5CSx

12/22/2020

• How To Manually Add Second MAC to Factory Config

12/08/2020

• Building uboot 181

12/05/2020

• External Serial EPCQ PROM Usage

11/20/2020

• Building sd 181

11/17/2020

• Building fpga 181
• Building qspi nor181
• Quartus 140
• Quartus 181 20201116

06/09/2020

• Carrier Board eMMC Usage

05/28/2020

• RTC Calibration Process

05/27/2020

• RTC Information

02/07/2020

• Module Debug Connection

05/28/2019

• Yocto for MitySOM-5CSX

03/15/2019

• Customizing the Kernel with Yocto
• Eclipse Oxygen and Yocto 244 (Rocko)

03/11/2019

• FPGA DDR Pinout

02/14/2019

• Yocto Dora Instructions

12/22/2018

• Linux GPIO Chip Mapping

06/14/2018

• Mounting Hole Locations

06/05/2018

• Linux Kernel

04/27/2018

• Shock and Vibration

08/19/2017

• Emulating Altera OpenCL
• MitySOM-5CSX DevKit OpenCL BSP

07/12/2017

• Building u-Boot and Preloader

04/21/2017

• Ethernet Throughput
• MitySOM-5CSX Development Status

04/07/2017

• MitySOM-5CSx Pin-Out Spreadsheet

01/06/2017

• Yocto with Qt5

11/28/2016

• Using embedded Qt with QtCreator

09/16/2016

• Power Supply Requirements

08/03/2016

• FPGA FAQs

06/07/2016

• ARM Software FAQs

05/25/2016

• Hardware Design Guidelines

05/02/2016

• Configuration

04/05/2016

• Clearance Beneath Module

11/09/2015

• Building Applications for MitySOM-5CSx using Eclipse and Yocto

06/05/2015

• CAD Files and Information

05/01/2015

• Building out-of-tree Kernel Modules

04/22/2015

• Setting up a RAM file system

04/13/2015

• SoM Temperature Sensor

04/01/2015

• Hardware FAQs

02/12/2015

• Hardware Version Number

02/11/2015

• Reset GPIOs

02/10/2015

• On-Module Trace Lengths

02/09/2015

• JTAG Chains
• MityARM-5CSX Board Design

01/13/2015

• Remote SignalTap

12/31/2014

• Hard setting RNDIS MAC address

11/19/2014

• Setting Static IP Address

08/07/2014

• FPGA direct DDR memory

06/25/2014

• PCIe Hard IP

05/23/2014

• On-Module USB Transceiver Information

05/06/2014

• Important Note about FPGAHPS SDRAM Bridge

05/05/2014

• Base Development Board
• Build a Quartus Project

05/02/2014

• Upgrading 130sp1 projects to 131

03/18/2014

• Altera Preloader Wiki

02/20/2014

• Yocto Starter Guide

02/13/2014

• Programming FPGA over JTAG

01/28/2014

• Installing Quartus II 130sp1 on Xubuntu 1204

01/23/2014

• HSMC Dual Camera Link

12/05/2013

• Writing to HPS Memory

10/21/2013

• Accessing FPGA Peripherals

08/06/2013

• Programming the FPGA Through U-Boot

06/28/2013

• Board Bring-up &

05/13/2013

• SDMMC Support

05/07/2013

• HPS Peripherals

04/16/2013

• FPGA Design
• Fractional PLLs

04/02/2013

• Altera References

03/12/2013

• Clock Speeds

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