MitySOM-5CSX Development Status¶
This table summarizes the current development status of the pre-production MitySOM-5CSX modules.
This is a high-level summary of the testing status of each component/peripheral available on the Critical Link 5CSx Development Board and is subject to change. Please contact Critical Link if you have any questions.
"Complete" indicates that the interface testing is completed. Additional testing will be performed throughout module production.
| Component/Peripheral | Comment | Status |
|---|---|---|
| HPS DDR3 SDRAM | Tested with Linux memtester | Complete |
| QSPI Flash | Tested using Linux mtd-utils; 16MB, 32MB and 48MB | Complete |
| RTC | Confirmed operational utilizing hwclock utility; RTC Information | Complete |
| RTC Battery | RTC Information | Complete |
| I2C LED Controller | LED Script Info | Complete w/Errata |
| Temperature Sensor | Temperature Sensor Info | Complete |
| FPGA DDR3 SDRAM | Count pattern test; Example script info | Complete w/Errata |
| JTAG | JTAG Info | Complete |
| USB OTG PHY Host | Complete | |
| USB OTG PHY Peripheral | Tested as RNDIS and Mass storage | Complete |
| USB Console Port | Complete | |
| SD/MMC Interface | Complete | |
| PCIe x4 Interface | x2 PCIe to SATA card working with a disk, 140 MB/s throughput; Example Project | Complete @ x2 Speed |
| Full HSMC Interface | Loopback testing complete;Working with CameraLink interface; HSMC Card Info | Complete |
| Partial HSMC Interface | Loopback testing complete; HSMC Card Info | Complete |
| RGMII1/Gb Ethernet Interface | IPERF Throughput Samples | Complete |
| Trace Bus Multiplexing | Hardware interface verified | Complete |
| FPGA Config Interface | Complete | |
| CAN Ports (2) | Complete | |
| SATA Port | On-hold |
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