Clock EN signal and I2C Dual purpose pin
Added by Dean Rasmussen 2 days ago
Regarding FPGA ball location AH2 "SCL_1V8". From my understanding, this pin can be driven low to enable the 100MHz CLKUSR on Y15. This is my global ref clock input.
This pin is labeled as "SCL_1V8" (I/O signal used for I2C).
Is it possible to use AH2 "SCL_1V8" as an I/O AND still have the 100MHz CLKUSR enabled on Y15?
Replies (4)
RE: Clock EN signal and I2C Dual purpose pin - Added by Mike Fiorenza 2 days ago
Hi Dean,
Pin AH2 is our CLKUSR enable pin. This does not leave the SOM and only goes to the enable pin of the 100 MHz oscillator. The output of the oscillator is then fed into Pin Y15. If you did not want to use the 100 MHz oscillator on the SOM as your user clock, you could use Y15 as an I/O pin instead.
SCL_1V8 is Pin AG1 and SDA_1V8 is Pin AH3 as stated in our datasheet. Are you seeing something in our documentation that is stating that Pin AH2 is SCL_1V8?
- Mike
RE: Clock EN signal and I2C Dual purpose pin - Added by Dean Rasmussen 2 days ago
Oh, I have an old version of the datasheet (August 8 2024) that says this. Grabbing the updated version now from your site. I think that clears up the issue, thanks!
RE: Clock EN signal and I2C Dual purpose pin - Added by Mike Fiorenza 1 day ago
Dean,
Sorry for the confusion! I see that was incorrect in the previous version of the datasheet now that I've checked the change log.
Let us know if you have any other questions!
- Mike
RE: Clock EN signal and I2C Dual purpose pin - Added by Dean Rasmussen 1 day ago
Hello Mike,
Thanks for the quick response and confirmation of the updated
documentation. We are working on implementation now and we will let you
know if we have any problems.
By the way, Ben Rodenbeck (copied on this email) is actually submitting
the help request. He has been using my Critical Link account. He is
going to create his own account.
Thanks again for the support,
Dean
On 2/10/2026 4:33 PM, Mike Fiorenza wrote:
