Activity
From 05/05/2011 to 06/03/2011
06/02/2011
- RG 12:17 PM Software Development: RE: ECC
- Ok, Thanks for the quick response.
- MW 12:11 PM Software Development: RE: ECC
- We are using mobile DDR2 x16 for our modules. There is no support for ECC.
-Mike
- Hello,
Does the MityDSP L138 module support ECC for the DDR2 RAM? If so, is there software support to enable this feature?
Thanks,
Rob Gillis
05/27/2011
- MW 10:00 AM FPGA Development: RE: FPGA configuration
- Rob,
The INIT_B pin (connected with external pullup to OMAP pin D2, AXR7/EPWMITZ[0]/GP1[15]) is an open drain output during/after config. If a CRC error is detected, it asserts low. So you could check the state of that pin after you... - RG 09:37 AM FPGA Development: RE: FPGA configuration
- Mike, I figured that readback may be an issue, but thanks for confirming it for me. Does the INIT pin provide proof (via CRC?) that the .bit file has been programmed correctly, or just that it's been taken out of programming mode?
Th...
05/26/2011
- MW 08:50 PM FPGA Development: RE: FPGA configuration
- Hi Rob,
Right now, we don't have an easy way to verify configuration cooked up.
The current MityDSP-L138F family of SOMs unfortunately do not connect the DONE pin to the OMAP or 1808. I think the INIT pin is available to monitor c... - Hello,
I'm trying to figure out an approach for validating the bitfile has been programmed correctly, and for monitoring the FPGA while running to detect corrupt configuration bits. Does the L138 board support configuration readback?...
05/18/2011
- MW 10:46 AM Software Development: RE: uPP support
- Hi Brian,
For the OMAP-L138, pin-muxing is just a fact of life. If you would like to use ethernet and uPP, then it might make sense to use the MII interface instead of the RMII interface. Otherwise, there are RMII pins that do confl... - BR 09:32 AM Software Development: RE: uPP support
- Hi Mike
This sounds good. An additional question would be about the pin configuration for the uPP port. In the excel sheet for port pins between FPGA og uC I have noticed that some pins are shared between the uPP and the RMII ports. A... - BR 08:02 AM Software Development: RE: Can't extract release 2011-03
- Hi Mike
Thanks for your quick reply. I will try it out.
BR
Brian - MW 07:53 AM Software Development: RE: Can't extract release 2011-03
- Hi Brian,
The .run file is really just a shell script. Turns out that it is calling out "/bin/sh" to run the script which self extracts, however it appears that it may require "/bin/bash" to operate correctly. I suspect that you may... - Hi
I'm not able to extract the latest board support package release.
I have downloaded the "release_2011-03-31.run" file, it decompress as expected with no errors and then shows the user licence. If I then use the space key to get ...
05/17/2011
- MW 10:53 AM Software Development: RE: uPP support
- Brian,
You should not have a problem achieving the rates you mentioned above. We have accomplished similar throughput with other designs doing a similar data shuffle, but had the DSP processing data before sending it to the ARM.
T... - BR 10:44 AM Software Development: RE: uPP support
- Hi Mike
We have discussed about the uPP port, and we have decided to try and use it in our project, due to the nice 1Gbit/s DMA transfer to the DSP. This will make our system more complex, because we use the ARM core, the DSP and the ...
05/06/2011
- BR 09:52 AM Software Development: RE: uPP support
- Hi Mike
You can send me the code by email.
I have downloaded the latest BSP, but haven't had the time to look at it yet.
Best regards
Brian
05/05/2011
- MW 10:04 AM Software Development: RE: uPP support
- Hi Brian,
Unfortunately, there is no linux side UPP driver available from TI. We have written one (it's rough) and are using it for the DSP core under DSP/BIOS for a couple of projects. The code for that is available in the more rec... - Hi
In the datasheet for the MityDSP L138 board there is a schematic with "uPP" interface between the OMAP and the FPGA. Is there a uPP Linux driver available, or an example project using uPP to communicate with the FPGA from a Linux a...