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From 05/22/2011 to 06/20/2011

06/13/2011

05:21 PM FPGA Development: RE: FPGA configuration
Hi Mike,
FYI, I just had a chance to try a bad configuration file, and the INIT pin was indeed low after programmi...
Rob Gillis

06/06/2011

10:35 AM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
Hi Mads,
Most of the files you need are in the latest tarball release. I've sent you the remaining files, which wi...
Gregory Gluszek
07:14 AM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
Hi
I am also looking for these files...
Could you email me them too?

Many thanks,
Mads
Mads Lind Christiansen

06/02/2011

12:17 PM Software Development: RE: ECC
Ok, Thanks for the quick response. Rob Gillis
12:11 PM Software Development: RE: ECC
We are using mobile DDR2 x16 for our modules. There is no support for ECC.
-Mike
Michael Williamson
11:56 AM Software Development: ECC
Hello,
Does the MityDSP L138 module support ECC for the DDR2 RAM? If so, is there software support to enable this...
Rob Gillis

05/27/2011

10:00 AM FPGA Development: RE: FPGA configuration
Rob,
The INIT_B pin (connected with external pullup to OMAP pin D2, AXR7/EPWMITZ[0]/GP1[15]) is an open drain outp...
Michael Williamson
09:37 AM FPGA Development: RE: FPGA configuration
Mike, I figured that readback may be an issue, but thanks for confirming it for me. Does the INIT pin provide proof ... Rob Gillis

05/26/2011

08:50 PM FPGA Development: RE: FPGA configuration
Hi Rob,
Right now, we don't have an easy way to verify configuration cooked up.
The current MityDSP-L138F famil...
Michael Williamson
05:32 PM FPGA Development: FPGA configuration
Hello,
I'm trying to figure out an approach for validating the bitfile has been programmed correctly, and for moni...
Rob Gillis
 

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