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From 05/08/2013 to 06/06/2013

06/06/2013

04:41 PM Software Development: RE: Warning messages when running DSP Hello World
I'm getting the same thing... Nick Arango
04:29 PM Software Development: RE: DSP vs NEON for Floating point
Digikey is open but managers' pockets are closed most of the time!
My circuit design is in flux still but I'm at t...
Conor O
11:39 AM Software Development: RE: DSP vs NEON for Floating point
Digikey is open 24 hours a day!
Do you have a lot of interfaces to rework if you retarget your module?
-Mike
...
Michael Williamson
11:28 AM Software Development: RE: DSP vs NEON for Floating point
Thank you for that Mike. I'm trying to figure out is it worth the pain of learning the DSP toolsets and dealing with ... Conor O
09:47 AM Software Development: RE: DSP vs NEON for Floating point
The DSP floating point performance is *very good* compared to the ARM9. It's actually faster (when coded right) than... Michael Williamson
09:40 AM Software Development: DSP vs NEON for Floating point
Dear Critical Link,
Now that you have newer modules in Cortex A8 and Dual A9 versions, I have a question as regard...
Conor O
12:51 PM Software Development: Noise on the Can Bus Interface
I have measured a significant 500kHz noise burst on the CAN bus pins of the Industrial IO board. the reason for check... Jeremy Young

06/05/2013

01:08 PM Software Development: RE: Can Interface won't probe
Okay, I had wiring problem. candump now dumps the received frames to the console. So we are up and running. thanks fo... Jeremy Young
12:33 PM Software Development: RE: Can Interface won't probe
Can you dump out the exact commands you used?
Thanks. (I am not a CAN expert, but I can try to track down the eng...
Michael Williamson
12:27 PM Software Development: RE: Can Interface won't probe
Well, Although the kernel now sees the CAN controller the ifconfig -a reads all zeros for everything even after I app... Jeremy Young
11:26 AM Software Development: RE: Can Interface won't probe
I applied the patch to the 3.2 kernel and it is now up and running. I will now check the the functionality with the c... Jeremy Young
11:00 AM Software Development: RE: Can Interface won't probe
I am dead in the water at the moment. I will try the patch set on the 3.2 kernel and let you know how it goes. Jeremy Young
10:23 AM Software Development: RE: Can Interface won't probe
Hello,
I've pushed a "patch set":http://support.criticallink.com/gitweb/?p=linux-davinci.git;a=commit;h=c008e4e8bb...
Michael Williamson
07:31 AM Software Development: RE: Can Interface won't probe
Hello Mr. Young,
I have reproduced the issue here. There are some patches that never made it to our external git ...
Michael Williamson

06/04/2013

01:51 PM Software Development: RE: Can Interface won't probe
The only other thing is I have your rs485 converter card plugged into the expansion port for UART2 Jeremy Young
01:44 PM Software Development: RE: Can Interface won't probe
The revision # is 80-000268RI-2B
I downloaded the latest release today and compiled the kernel with out the audio ...
Jeremy Young
01:35 PM Software Development: RE: Can Interface won't probe
Can you please send me the revision of the board you are working with (there should be an 80- number somewhere on the... Michael Williamson
01:01 PM Software Development: RE: Can Interface won't probe
It is just the eth0 and lo entries. there is no can0 entry. the probe fails on boot up. Jeremy Young
12:07 PM Software Development: RE: Can Interface won't probe
Can you dump the text of "ifconfig -a"?
-Mike
Michael Williamson
12:06 PM Software Development: RE: Can Interface won't probe
In case it is important I am using the Am1810 with the industrial IO board. I have tried both Linux branches and they... Jeremy Young

06/03/2013

05:14 PM Software Development: Can Interface won't probe
I get the following dmesg about the MCP251x not working,
MCP251x didn't enter in conf mode after reset
Is there...
Jeremy Young

05/31/2013

03:58 AM Software Development: can't detect USB2.0 device
I'm using a USB 2.0 ethernet adapter with mityARM-1808.
It works good in 2.6.34.rc1 kernel but bad in 3.2.0.
I do a...
yilin wang

05/29/2013

09:20 AM Software Development: RE: Debugging DSP-App when DSPLink is running
Hi Christian,
See the last section of http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Qu...
Gregory Gluszek
06:03 AM Software Development: Debugging DSP-App when DSPLink is running
Hi all,
what is the usual procedure for debugging the DSP-App when using the DSPLink?
Based on the DSPLink exam...
Christian Rückl
03:40 AM Software Development: RE: U-Boot ELF loader
Oops, my silly. That now works, it takes the TI CCS image and moves sections to the correct address and runs :)
...
Bruce Kenny

05/28/2013

11:27 AM FPGA Development: UPP Missing Line Interrupt
Hello,
I'm using the UPP on the OMAP-L138F to receive video data that's been buffered by the Xilinx FPGA. The FPGA l...
Wade Calcutt
11:06 AM Software Development: RE: U-Boot ELF loader
Hi Bruce,
Looking at your elf information, it looks like you are loading the ELF image to 0xc0700000, which is rig...
Michael Williamson
08:51 AM Software Development: RE: U-Boot ELF loader
The above thread has gone a little cold, does anyone know if uboot ELF loader should work with TI Code Composer gener... Bruce Kenny

05/24/2013

10:40 AM Software Development: ARM memory transfer hanging DSP
I am running DSP/BIOS on the DSP and linux on the ARM (MDK_2012-08-10).
The DSP receives data from the McBSP1 via ...
Mary Frantz

05/22/2013

08:18 AM FPGA Development: RE: FPGA load verification
Mike,
While troubleshooting the state of the lock status line I did discover there were instances of the clock not...
Wade Calcutt
08:05 AM Software Development: RE: SATA link down
Hi,
Can you confirm that your drive is limited to SATA-II link speeds.
See the "AM1808 Errata":http://www.ti....
Michael Williamson
04:53 AM Software Development: SATA link down
I am attaching SATA SSD drives to MityARM1808.I am using 2.6.x kernel and NFS.My SSD is formated EXT2 with 1 Partitio... yilin wang

05/21/2013

11:14 AM Software Development: RE: Open Embedded Core Process Release Date
As of right now and the foreseeable future the bitbake process is not working.
Your best options for creating a ...
Jonathan Cormier
10:48 AM Software Development: RE: Open Embedded Core Process Release Date
Hi,
Sorry for the lack of detail,
I want to setup an Open Embedded/Angstrom build system for a product I'm wor...
Kevin Robertson
10:47 AM Software Development: RE: Open Embedded Core Process Release Date
Are you refering to this other post?
http://support.criticallink.com/redmine/boards/10/topics/2573?r=2707
It appe...
Jonathan Cormier
10:39 AM Software Development: RE: Open Embedded Core Process Release Date
Kevin,
Have you seen this page [[Starter_Guide]]?
Also we just released a new MDK that contains an updated kern...
Jonathan Cormier
09:34 AM Software Development: Open Embedded Core Process Release Date
Hi,
I'm trying to build a MityDSP Image from the currently released information/files without success,
I reali...
Kevin Robertson
05:30 AM Software Development: RE: U-Boot ELF loader
Mike, thanks for your reply.
I tried lminfo and it doesn't recognise the image. I attach a log of the u-boot comm...
Bruce Kenny

05/20/2013

09:39 AM Software Development: RE: ethernet over USB don't work
My problem is solved now.
Thanks a lot.
yilin wang
08:45 AM Software Development: RE: U-Boot ELF loader
You may need to provide an "entry point" argument to the linker to point to the location in memory that the code shou... Michael Williamson
08:17 AM Software Development: RE: U-Boot ELF loader
Jonathan,
Thanks for pointing me in the right direction. I have downloaded the latest MDK and installed u-boot. Th...
Bruce Kenny

05/19/2013

10:00 PM Software Development: RE: ethernet over USB don't work
How to do this change ?
I could find the call "mityomapl138_usb_init(MUSB_OTG)" in which file ?
An odd thing is...
yilin wang

05/17/2013

03:04 PM FPGA Development: RE: FPGA load verification
Thanks Mike.
I'm troubleshooting using your suggestions. I'll let you know what I find.
Wade Calcutt
10:23 AM Software Development: RE: Start Guide : Cannot build helloworld application with eclipse
Hello,
Have you run the environment setup script:...
Gregory Gluszek
06:02 AM Software Development: RE: Open Embedded build error
Hi,
Was there a resolution to this problem - I'm having the same problem.
Is it because mitydsp-preferred-revs...
Kevin Robertson

05/16/2013

05:53 PM Software Development: RE: Video output blinks frequently
FIXED! I changed VPIF DMA0/1 priority from 4 to 1 and the blinks went away. Thanks you, Mike.
-Helmut
Helmut Forren
08:45 AM Software Development: RE: U-Boot ELF loader
Bruce,
Elf support was added on the following commit.
http://support.criticallink.com/gitweb/?p=u-boot-mitydspl13...
Jonathan Cormier
05:25 AM Software Development: U-Boot ELF loader
Am I correct in thinking that the latest u-Boot has an ELF loader? I take it that this will load an ELF image into R... Bruce Kenny

05/15/2013

11:40 AM Software Development: RE: Video output blinks frequently
Mike,
I'm using VPIF. It *might* also be the case that my interfering tasks are interfering because they're trans...
Helmut Forren
11:10 AM Software Development: RE: Video output blinks frequently
VPIF! Helmut Forren
11:08 AM Software Development: RE: Video output blinks frequently
Mike:
Thanks for the advice. FYI, this is same project as Wade Calcutt is working on, regarding FPGA loading prop...
Helmut Forren
10:26 AM Software Development: RE: Video output blinks frequently
I suspect that you need to increase the bus master DMA priority of the VPIF or LCDC peripherals (it's not clear to me... Michael Williamson
10:24 AM Software Development: RE: Video output blinks frequently
Helmut,
First thing is which version of the kernel are you running?
__uname -a__
Also the command __nice__ c...
Jonathan Cormier
10:10 AM Software Development: Video output blinks frequently
My custom system is based on the MityOMAP-L138F.
At random times, but fairly frequently, my video output corrupts ...
Helmut Forren

05/14/2013

10:43 AM FPGA Development: RE: FPGA load verification
You might bring the DCM status lines (particularly the lock status) to a scope just to see if that is the core issue.... Michael Williamson

05/13/2013

03:12 PM FPGA Development: RE: FPGA load verification
Mike,
To my knowledge we're not changing the CPU frequency. That being said, one of the output messages during Lin...
Wade Calcutt
01:09 PM FPGA Development: RE: FPGA load verification
Wade,
The EMIFA output clock can change if the OMAP-L138 CPU frequencies are modified (the EMIFA output clock is o...
Michael Williamson
12:28 PM FPGA Development: RE: FPGA load verification
Hi Mike,
Thanks for your response and troubleshooting suggestions.
To answer your questions:
*Are you using ...
Wade Calcutt
12:12 PM FPGA Development: RE: FPGA load verification
Hi Wade,
If you are getting the "done" light on the part, then the FPGA is loading correctly and it's 99.999999999...
Michael Williamson
11:33 AM FPGA Development: FPGA load verification
I'm using a MityDSP-L138F with an FPGA load that is a modified version of the example code provided in the Vision Dev... Wade Calcutt

05/09/2013

03:48 PM Software Development: RE: GPIO interrupt in MityOMAP-L138F
I am glad you were able to figure this out, and these notes are helpful. Thanks for posting them.
We have been st...
Michael Williamson
02:58 PM Software Development: RE: GPIO interrupt in MityOMAP-L138F
Hi Mike,
I successfully implemented an interrupt example using FPGA Gpio core and your core libraries on DSP.
Mayb...
Michele Canepa
 

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