Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

07/29/2024

05:36 PM PCB Development: RE: X1 component SiLabs 590 BA100M000G depopped

See "PCN20220621000":https://support.criticallink.com/redmine/attachments/download/31707/PCN20220621000.pdf linked fr... Jonathan Cormier

02:09 PM PCB Development: X1 component SiLabs 590 BA100M000G depopped

Hello,
we are working on transferring our design from the Spartan 6 build to the A7 SOM and an engineer noticed n... Rachel Shaska

07/24/2024

02:31 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

I figure it's about 10% of the CPU when operating 1200 baud and 1 response per second; it gets much lower as you appr... Fred Weiser

07/22/2024

07:21 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

> before shutting off the 485 driver
Any idea how often the shutting down occurs? Jonathan Cormier

07:19 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

I patched the 8250.c file to increase the 10ms timeout. I found the timeout is really there only to assure the uart t... Fred Weiser

07/19/2024

06:14 PM PCB Development: RE: MityDSP-L138F Block Diagram Inconsistencies

Dan,
That clears things up perfectly. Thank you for a quick and comprehensive response. Dylan Louviaux

06:10 PM PCB Development: RE: MityDSP-L138F Block Diagram Inconsistencies

Hi Dylan,
The external input to the Boot Config Block is the EXT_BOOT# signal pin bin 12 of the SO-DIMM connector.... Daniel Vincelette

04:06 PM PCB Development: MityDSP-L138F Block Diagram Inconsistencies

All,
I am designing a carrier board for the MityDSP-L138F with A7 FPGA. I have noticed some inconsistencies with the... Dylan Louviaux

07/03/2024

02:19 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote in message#6697:
> Hi Jonathan,
> Thank you for the response, please let me know what you fi... Jonathan Cormier

07/01/2024

09:16 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi Jonathan,
Thank you for the response, please let me know what you find out! The system as a whole must be under ... Michael Bisbano

07:05 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote:
> Hi all,
>
> I was wondering if anyone had data on power draw for the MityDSP-L138 in dee... Jonathan Cormier

06:34 PM Software Development: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi all,
I was wondering if anyone had data on power draw for the MityDSP-L138 in deep sleep? My application is bat... Michael Bisbano

03:49 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Fred Weiser wrote in message#6688:
> Changing the timer is probably not in my best interest; my project supports dow... Jonathan Cormier