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Industrial IO Host Board

Overview

The Industrial I/O Host board is a mother board that Critical Link includes with our Development Kit for the MityDSP-L138F family of System On Modules. Full details regarding the Industrial I/O board, including the datasheet, may be found on the MityDSP Website. The host board includes the following interfaces:

  • USB 1.1 Host Port
  • USB 2.0 Client Port (mini-B connector)
  • MII Based Ethernet Interface (RJ-45)
  • LCD/Touchpanel connector (for Critical Link LCD and DVI Display Solutions)
  • External UART supporting RS-232 or RS-485 interface with isolated +5V supply (using profibus adapter module)
  • CAN interface with isolated +5V supply:
  • DVI port
  • expansion headers
  • RS-232 console serial port
  • SATA port

Note: For display resolutions less than VGA in size the DVI port and the LCD connector cannot be used at the same time, though it is safe to connect devices to each port at the same time.

Vision Development and Demo Systems

The industrial I/O host board can be used to develop a machine vision application when paired with a simple expansion board and Aptina camera CCD heads available from Critical Link. Critical Link provides 2 demonstration systems that may be used as a starting point for embedded vision applications. See the links below for additional information.

- Vision Framework Kit
- Laser Tracking Demo

Using the Industrial I/O board with FPGA-less SOMs

The industrial I/O host board was designed originally for the FPGA based SOMS (i.e., the MityDSP-L138F, MityARM-1808F, and MityARM-1810F), but may also be used with FPGA-less variants of the modules (i.e., the MityDSP-L138, MityARM-1808, and MityARM-1810) with the following caveats:

  1. On-Board NAND timings must be reduced. The FPGA-less SOMs extend the EMIFA bus out to the edge connector in lieu of the FPGA I/O pins. On the Industrial I/O host board, these signals are routed to the expansion headers as well as some other circuitry, and as a result several large stubs have been created for the EMIFA bus signals. Critical Link has observed NAND access errors in this configuration during qualification testing (over temperature) using FPGA-less modules. The issue was resolved, on the Industrial I/O host board, by adding additional wait states to the default NAND timings (contact critical link for details). The issue does not present on host I/O board designs that do not create arbitrarily long stubs on the EMIFA bus. You can avoid this issue by not using the NAND while evaluating FPGA-less modules on the Industrial I/O boards supplied with our development kits by (for example) booting instead from MMC, network, USB, or a SATA drive. NAND is not required/used for first or second level bootloading on MityDSP-L138 modules.
  2. LCD/Touchpanel interface is not usable. The LCD/Touchpanel interface requires serializer drivers in the FPGA for proper interfacing to LCD panels provided by Critical Link. The header may be used for other functions, but it will not work with critical link provided LCD panels.

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