Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

01/09/2014

08:50 AM FPGA Development: RE: I/O voltage

Thanks, very useful info. Will give it a try over the next couple of weeks.
Nigel. Nigel Doe

01/08/2014

04:57 PM FPGA Development: RE: I/O voltage

Hi Nigel,
Below you will find the details to support additional IO standards. I believe this covers all the neces... Adam Dziedzic

01:53 PM FPGA Development: RE: I/O voltage

Any update on whether the dev kit can be configured for 3.3v I/O?
Thanks,
Nigel. Nigel Doe

12/23/2013

10:46 AM FPGA Development: RE: I/O voltage

No problem, it can wait a while.
Sounds like the SOM may have been catered for. Any thoughts on the dev kit or do ... Nigel Doe

09:03 AM FPGA Development: RE: I/O voltage

Hi Nigel,
The best guy to answer this question is on break this week and a good chunk of next week, can you wait f... Michael Williamson

08:15 AM FPGA Development: I/O voltage

I would like to interface the MityARM-5C SX dev kit to an existing piece of equipment for evaluation purposes, howeve... Nigel Doe

12/16/2013

12:23 PM FPGA Development: RE: HPS Memory Controller

Hi Dan,
We figured it out last week. So we are fine with this for now.
Jack Anonymous

12/12/2013

05:17 PM FPGA Development: RE: HPS Memory Controller

Hi Dan,
I'm still confused about this. Would it be possible to provide an example of multiple packets?
For exam... Anonymous