Activity

From 12/17/2025 to 01/15/2026

05:03 PM MitySBC-Agilex5 FPGA Development: RE: hps_sybsys.qsys not getting validated in platform Designer and Quartus hanging: Hi Eleonora,
There was a major bug in quartus related to timestamps in January (starting 1/10). You likely need t... Michael Williamson
04:37 PM MitySBC-Agilex5 FPGA Development: hps_sybsys.qsys not getting validated in platform Designer and Quartus hanging: Hello,
I downloaded the Example projects for Quartus Pro 25.3, copied and renamed the base project and just tried to... Eleonora Haralanova

08:37 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance: The RMA on this thread has been handled and completed.
For anyone looking for resolution to the question about the... Mike Fiorenza

04:14 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Glad you were able to work through the stuff I described and get things working, you're welcome!
Yes, ... Seth Graber
12:28 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi Seth,
I found all the stuff that you described below and have started to study the .vhd file. Thanks. I also got... John Iannuzzi

02:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Apologies, I believe I sent you an internal link. The schematic you have is correct and has the same conn... Seth Graber
02:25 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: I have this schematic...
80-000578RC-10_SCH_RevB.PDF John Iannuzzi
12:47 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi Seth,
I'll take a look. Also, I get a page load error with the 1st link :
https://svnsrv.syr.criticallink.com/s... John Iannuzzi

04:34 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Thank you, happy (belated) Holidays to you as well! I appreciate your patience for a response as I was ou... Seth Graber

04:14 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX: Hi Seth,
Happy Holidays!
Ok, I was able to rebuild the device tree as you instructed and got it all to work, includ... John Iannuzzi

10:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: Fixture to Flash Image in Production: Holden Wozniak wrote:
> We are looking into ways to flash an image onto a SOM with eMMC in production.
>
> Our cu... Jonathan Cormier
08:28 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: Fixture to Flash Image in Production: We are looking into ways to flash an image onto a SOM with eMMC in production.
Our current thought was to utilize ... Holden Wozniak

08:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5CSX Dev Kit – USB OTG J401 not detecting USB devices: Hi Atef,
We just doubled checked on our side that the image you mentioned (Yocto (Poky 2.4.4, kernel 5.4.23-yocto-... Mike Fiorenza
04:41 PM MitySOM-5CSX Altera Cyclone V FPGA Development: MitySOM-5CSX Dev Kit – USB OTG J401 not detecting USB devices: Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4,... Anonymous fpga
07:18 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access: Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4,... Anonymous fpga

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