Critical Link Support

02/26/2018

06:21 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM-5CSX ethernet PHY errors prevent ethernet in Linux

Sounds like reset is working properly.
Are the MDIO pins connected the same way as for the Dev Kit?
Have you up... Michael Williamson

02/23/2018

12:31 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM-5CSX ethernet PHY errors prevent ethernet in Linux

What PHY are you using?
This sounds a lot like the PHY is maybe getting held in reset. Do you have a GPIO connect... Michael Williamson

02/07/2018

12:26 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Kernel panics on custom board: "No init found. Try passing init= option to kernel"

Is your custom board using a MityDSP-L138, or have you designed a custom board using the OMAP-L138 and not the module... Michael Williamson

02/01/2018

09:32 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using McASP Rx clock generation module

Hi Tom,
Have you checked the pinmux settings for the IO Pin are set to use the McASP function and not GPIO or some... Michael Williamson

01/31/2018

02:42 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA Done led not turning on with CPU programming

How are you generating the bin file?
Check this "wiki page":https://support.criticallink.com/redmine/projects/arm9... Michael Williamson