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Boot loader on NAND instead of NOR
Added by Simon Therriault over 13 years ago
Hi,
One of the big problem I am facing right now is the fact that both PWM modules aren't usable at all. PWM 0 is lost for ethernet and PWM 1 is lost because of the chip select of the NOR. We know we could write a PWM core for the FPGA but since the PWM module is really complete on the DSP core, it would help us a lot to use it.
What we're wondering is if it would be doable to boot from the NAND instead (EMIFA). I know the UBoot image is in the NOR but if we could free the SPI1 chip select, the PWM would be free also.
So, is it possible to boot from the EMIFA?
Is it possible to put the U-BOOT on the NAND and boot from it?
Is it possible to put the rest of the NOR content (8MB max) at the beginning of the NAND (256MB) and reduce the size of the file system (128MB)?
We are really trying to recover one PWM, so any help would be appreciated!
Thanks!
Replies (3)
RE: Boot loader on NAND instead of NOR - Added by Mike Pilawa over 13 years ago
Hi Simon,
While it is indeed possible for the OMAP-L138 CPU to boot from NAND, this is not a boot mode that Critical Link supports on the MityDSP-L138 SoM. It would take both a minor change to the hardware assembly, and boot software to support this method of booting.
However, an alternative would be to switch the Ethernet MAC from using the MII interface to the RMII interface, which would need to be piped through the FPGA. This would free up the MII pins for alternate functions such as one of the PWM's. We have already used the RMII interface piped through the FPGA on at least on other application, so it would be very easy for us to support you in this way. If you are unfamiliar with RMII, it supports the same full-duplex 100Mbit link as MII, but uses less pins running at a faster clock rate. You would be required to use an RMII capable PHY such as SMSC's LAN8710A. Does this sound like an acceptable alternative?
- Mike PilawaRE: Boot loader on NAND instead of NOR - Added by Simon Therriault over 13 years ago
Hey Mike,
Yes the RMII is a good alternative. When we will be there, I will probably ask for some support. What we are planning to use are these peripherals
GP0: Used for parallel access to ADCs
PWM0
RMII: Ethernet
UART0: RS485
UART1: debug RS232
Also, I was wondering if using the RMII for the ethernet, I still need the MDIO pins? Not sure where all those pins need to go.
Thank you very much!
RE: Boot loader on NAND instead of NOR - Added by Mike Pilawa over 13 years ago
Hi Simon,
It is still a good idea to hook up the MDIO pins to the PHY. The same two MDIO pins used in MII mode are also used in RMII mode. So the majority of the RMII signals would route through the FPGA, but the two MDIO pins would route straight to the OMAP CPU.
GP0 certainly can be used to connect to ADCs and be controlled under CPU control or PRU control (a subset of the GP0 pins). But would you consider using the uPP port for ADC access? I don't know your application - ADC speed or serial/parallel access, but the uPP is definitely a good fit for parallel access ADCs (and DACs). We have at least one application using this method. Anyway, just thought I'd throw that out there.
Cheers!
