Added by stephan berner almost 6 years ago
I am having problems reading data from the FPGA to memory. I set up the UPP interface
using channel A from transmit, channel B for receive, and start the receive transactions
using the code below
#define SHARED_BUFFER_RX 0x80010000
buffer = (uint8 *)SHARED_BUFFER_RX;
for(uint32 i = 0; i < len; i++)buffer[i] = 0; //initialize buffer
UPQD0 = SHARED_BUFFER_RX;
UPQD1 = 0x00010000 | len ; //one line of length "len"
UPQD2 = 0;
START_UPP_RX; //tell FPGA to write data to UPP
while(UPQS2 & 2); //wait until DMA done
//data is now in the shared buffer
This works fine when testing it inside a minimal test program.
However when I try to integrate it into an existing large and complex application,
I run into the following problem. It seems that the UPP DMA system can't access the
memory, not the shared buffer use above and not any other memory. After the DMA has
finished, the buffer still contains the initial values (0).
Is there any system setting, that can cause this kind of behaviour ?
The TX clk (upp_clk_a) is ok, therefore the clock for UPP the module is present.
I verified the UPP signals with an oscilloscope, they look ok.
I also tried to reinitialize the PINMUX registers and the UPP interface
before each transaction, but that doesn't help either.
RE: UPP problem - Added by stephan berner almost 6 years ago
Problem was caused by cache incoherency. Use of BCACHE_inv() fixed it.
RE: UPP problem - Added by Douglas Gomes over 1 year ago
+1. Just wanted to give attention to this solution, which also solved a 2-day problem that I was having when receiving values.
The values read from the buffers were never updated until I did the invalidation of the cache.
RE: UPP problem - Added by Jonathan Cormier over 1 year ago
Thanks for bringing this up again. We'll look into it.