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FPGA configuration via u-Boot problem
Added by Stefan Krassin about 10 years ago
Hi all,
I have a problem with the configuration of the FPGA and booting linux.
I followed the instructions from CL "Using u-Boot to load the FPGA".
If I run the boot command "bootcmd=sf probe 0; sf read 0xc0700000 0x100000 0x280000; bootm 0xc0700000" without configuring the FPGA everything works without any problems.
But by setting "bootcmd=run progfpga; sf probe 0; sf read 0xc0700000 0x100000 0x280000; bootm 0xc0700000" (first configuring the FPGA and the strating the kernel) causes the kernel to stop at a specific point and nothing happens anymore.
U-Boot > OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.
U-Boot 2009.11 (Jan 13 2014 - 11:14:02)
I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
Net: Ethernet PHY: GENERIC @ 0x03 [0x8]
Hit any key to stop autoboot: 0
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x80000 bytes
Loading FPGA done
8192 KiB M25P64 at 0:0 is now current device
## Booting kernel from Legacy Image at c0700000 ...
Image Name: Linux-3.2.0
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 2530168 Bytes = 2.4 MB
Load Address: c0008000
Entry Point: c0008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Linux version 3.2.0 (root@mitydsp) (gcc version 4.5.4 20120305 (prerelease) (GCC) ) #1 PREEMPT Mon Jan 13 11:06:16 EST 2014
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: MityDSP-L138/MityARM-1808
Ignoring unrecognised tag 0x42000101
Memory policy: ECC disabled, Data cache writethrough
DaVinci da850/omap-l138/am18x variant 0x1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 24384
Kernel command line: mem=96M console=ttyS1,115200n8 mtdparts=nand:128M(rootfs),-(userfs) root=/dev/mtdblock0 rw,noatime rootfstype=jffs2
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 96MB = 96MB total
Memory: 91368k/91368k available, 6936k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc6800000 - 0xfea00000 ( 898 MB)
lowmem : 0xc0000000 - 0xc6000000 ( 96 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc052c598 (5266 kB)
.init : 0xc052d000 - 0xc0555000 ( 160 kB)
.data : 0xc0556000 - 0xc05b5a80 ( 383 kB)
.bss : 0xc05b5aa4 - 0xc05e2490 ( 179 kB)
NR_IRQS:245
Console: colour dummy device 80x30
Calibrating delay loop... 148.88 BogoMIPS (lpj=744448)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
DaVinci: 144 gpio irqs
print_constraints: dummy:
NET: Registered protocol family 16
baseboard_pre_init: Entered
mityomapl138_setup_nand: using 8 bit data
baseboard_init [IndustrialIO]...
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
print_constraints: VDCDC1: 1150 <--> 1350 mV at 1200 mV
print_constraints: VDCDC2: 1800 mV
print_constraints: VDCDC3: 1200 mV
print_constraints: LDO1: 1800 mV
print_constraints: LDO2: 2500 <--> 3300 mV at 3300 mV
Advanced Linux Sound Architecture Driver Version 1.0.24.
Switching to clocksource timer0_1
musb-hdrc: version 6.0, ?dma?, otg (peripheral+host)
Waiting for USB PHY clock good...
musb-hdrc musb-hdrc: USB OTG mode controller at fee00000 using PIO, IRQ 58
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 178
io scheduler noop registered (default)
start plist test
end plist test
Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0x1c42000 (irq = 25) is a 16550A
serial8250.0: ttyS1 at MMIO 0x1d0c000 (irq = 53) is a 16550A
console [ttyS1] enabled
serial8250.0: ttyS2 at MMIO 0x1d0d000 (irq = 61) is a 16550A
brd: module loaded
at24 1-0050: 256 byte 24c02 EEPROM, read-only, 0 bytes/write
MityOMAPL138: Found MAC = 00:50:c2:e6:7a:63
MityOMAPL138: Part Number = L138-FG-225-RC
ahci ahci: forcing PORTS_IMPL to 0x1
ahci ahci: AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl platform mode
ahci ahci: flags: ncq sntf pm led clo only pmp pio slum part ccc
scsi0 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x01e18000-0x01e19fff] port 0x100 irq 67
ONFI flash detected
ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2G08ABAEAWP)
Bad block table found at page 131008, version 0x01
Bad block table found at page 130944, version 0x01
Creating 2 MTD partitions on "davinci_nand.1":
0x000000000000-0x000008000000 : "rootfs"
0x000008000000-0x000010000000 : "homefs"
davinci_nand davinci_nand.1: controller rev. 2.5
spi_davinci spi_davinci.1: DMA: supported
spi_davinci spi_davinci.1: DMA: RX channel: 18, TX channel: 19, event queue: 0
m25p80 spi1.0: m25p64-nonjedec (8192 Kbytes)
Creating 8 MTD partitions on "m25p80":
0x000000000000-0x000000010000 : "ubl"
0x000000010000-0x000000090000 : "u-boot"
0x000000090000-0x0000000a0000 : "u-boot-env"
0x0000000a0000-0x0000000b0000 : "periph-config"
No LCD configured
MII PHY configured
0x0000000b0000-0x000000100000 : "reserved"
0x000000100000-0x000000400000 : "kernel"
ata1: SATA link down (SStatus 0 SControl 300)
0x000000400000-0x000000600000 : "fpga"
0x000000600000-0x000000800000 : "spare"
spi_davinci spi_davinci.1: Controller at 0xfef0e000
CAN device driver interface
mcp251x spi1.1: probed
davinci_mdio davinci_mdio.0: davinci mdio revision 1.5
davinci_mdio davinci_mdio.0: detected phy mask fffffff7
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[3]: device 0:03, driver unknown
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci ohci.0: DA8xx OHCI
ohci ohci.0: new USB bus registered, assigned bus number 1
Waiting for USB PHY clock good...
ohci ohci.0: irq 59, io mem 0x01e25000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mousedev: PS/2 mouse device common for all mice
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc0
omap_rtc: RTC power up reset detected
i2c /dev entries driver
cpuidle: using governor ladder
cpuidle: using governor menu
davinci_mmc davinci_mmc.0: Using DMA, 4-bit mode
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
dsd1791 spi1.2: Failed to add route LLOUT->Line Out
asoc: dsd1791 <-> davinci-mcasp.0 mapping ok
ALSA device list:
#0: MityDSP-L138 INDIO
TCP cubic registered
NET: Registered protocol family 17
can: controller area network core (rev 20090105 abi 8)
NET: Registered protocol family 29
can: raw protocol (rev 20090105)
regulator_init_complete: LDO2: incomplete constraints, leaving on
regulator_init_complete: LDO1: incomplete constraints, leaving on
regulator_init_complete: VDCDC3: incomplete constraints, leaving on
regulator_init_complete: VDCDC2: incomplete constraints, leaving on
regulator_init_complete: VDCDC1: incomplete constraints, leaving on
console [netcon0] enabled
netconsole: network logging started
omap_rtc omap_rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
That happens all the time when the FPGA is configured first.
Here is my u-Boot environment:
bootdelay=3
baudrate=115200
flashuboot=tftp 0xc0700000 mityomap/u-boot-ubl.bin; sf probe 0; sf erase 0x10000 0x80000; sf write 0xc0700000 0x10000 ${filesize}
flashkernel=tftp 0xc0700000 mityomap/uImage; sf probe 0; sf erase 0x100000 0x280000; sf write 0xc0700000 0x100000 ${filesize}
flashubl=tftp 0xc0700000 mityomap/UBL_SPI_MEM.ais; sf probe 0; sf erase 0 0x10000; sf write 0xc0700000 0 0x10000
autoload=no
mtdids=nand0=nand
mtdparts=mtdparts=nand:128M(rootfs),-(userfs)
bootargsbase=mem=96M console=ttyS1,115200n8
flashargs=setenv bootargs ${bootargsbase} ${mtdparts} root=/dev/mtdblock0 rw,noatime rootfstype=jffs2
bootfile=uImage
bootargs=mem=96M console=ttyS1,115200n8 mtdparts=nand:128M(rootfs),-(userfs) root=/dev/mtdblock0 rw,noatime rootfstype=jffs2
filesize=71544
fileaddr=C0700000
gatewayip=192.168.1.10
netmask=255.255.255.0
ipaddr=192.168.1.115
serverip=192.168.1.105
progfpga=sf probe 0; sf read 0xc0700000 0x580000 0x80000; loadfpga 0xc0700000 0x80000
flashrootfs=tftp 0xc2000000 mityomap-full.jffs2; nand erase 0 0x08000000; nand write.jffs2 0xc2000000 0 0x50e9000
bootcmd=run progfpga; sf probe 0; sf read 0xc0700000 0x100000 0x280000; bootm 0xc0700000
stdin=serial
stdout=serial
stderr=serial
ethaddr=00:50:c2:e6:7a:63
ver=U-Boot 2009.11 (Jan 13 2014 - 11:14:02)
Environment size: 1282/65532 bytes
I hope someone can help me.
Stefan
Replies (2)
RE: FPGA configuration via u-Boot problem - Added by Stefan Krassin about 10 years ago
Hey,
I solved the problem.
It's important that the FPGA config file <fpga>.bin file was created correctly.
By using Xilinx Impact I selected the following options in the "Create PROM file" dialog:
1. Generic Parallel PROM
2. Auto Select PROM
3. File Format -> BIN (Swap bits ON)
I hope the answer could help someone!
Reg,
Stefan
RE: FPGA configuration via u-Boot problem - Added by Gregory Gluszek about 10 years ago
You can also use the promgen command to generate a bin file from a bit:
promgen -w -p bin -u 0 filename.bit -o filename.bin
\Greg
