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Pull-up Enable for MityDSP L138 (cp[0])

Added by Ronald Kabler over 5 years ago

I'm trying to get a new hardware design up and running with the MityDSP L138, using the Industrial IO board as a starting point. I've noticed that in U-Boot, the enables set at DAVINCI_PUPD_ENA for groups 5, 8, 9 and 15 are set to 0 (disable pull-ups/pull-downs), which is fine. However, somewhere prior to this, the enable for group 0 (cp0) is also set is to 0, even before board_init() is called in baseboard-industrialio.c.

Is there some reason the module needs internal pull-ups disabled on cp0?


Replies (1)

RE: Pull-up Enable for MityDSP L138 (cp[0]) - Added by Jonathan Cormier over 5 years ago

To be more specific, CP[0] covers the following pins: GP0[8] (OMAP_GP0_8), GP0[9] (OMAP_GP0_9), AHCLKX (AUDIO_SYSCLK), AHCLKR (AUDIO_SYSCLK), AFSX (AUDIO_FRAME), GP0[13] (OMAP_GP0_13), ACLKX (AUDIO_CLK), GP0[15] (OMAP_GP0_15)

  • The GPIO pins aren't connected to anything on the board so the pull down shouldn't matter.
  • I'm not familiar with the audio chip but I don't believe it would be affected by the pull downs. The only pin that would be affected is the CODEC_CS signal which has a 1.8k pull-up to make sure that the chip select isn't enabled during power up. Its possible the pull downs were disabled to save power due to this pull up. http://www.ti.com/lit/ds/sles072b/sles072b.pdf
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