Project

General

Profile

continual reboot

Added by Craig Meyers over 12 years ago

Hi,

I modified the FPGA code and during the write the board rebooted.
I had bootfpga set to load the fpga automatically on boot so now I'm stuck.
How do I break this infinite reboot loop?
HyperTerminal session looks like this:

OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Mar 31 2011 - 19:39:18)

I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x170000 bytes
OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Mar 31 2011 - 19:39:18)

I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x170000 bytes
OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Mar 31 2011 - 19:39:18)

I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x170000 bytes
OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Mar 31 2011 - 19:39:18)

I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x170000 bytes
OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 128MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 BuiltJul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Starting SPI Memory Copy...
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Mar 31 2011 - 19:39:18)

I2C: ready
DRAM: 128 MB
NAND: 256 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 0
Resetting ethernet phy
8192 KiB M25P64 at 0:0 is now current device
Loading FPGA from 0xC0700000 with 0x170000 bytes


Replies (6)

RE: continual reboot - Added by Michael Williamson over 12 years ago

Try hitting control-C continuously while booting. If that does not work, you can use the "programming a dead board" technique using the UART loader to reflash the SPI from the ground up. I think that control-C should work for you, though.

-Mike

RE: continual reboot - Added by Craig Meyers over 12 years ago

Control-C does not work. Tried in both HyperTerminal and Putty.

Also tried dead board instructions with seemingly successful results but still got the autoboot loop:

(AIS Parse): BOOTME received!
(AIS Parse): Performing Start-Word Sync...
(AIS Parse): Performing Ping Opcode Sync...
(AIS Parse): Processing command 0: 0x58535901.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Loading section...
(AIS Parse): Loaded 9340-Byte section to address 0x80000000.
(AIS Parse): Processing command 1: 0x58535901.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Loading section...
(AIS Parse): Loaded 812-Byte section to address 0x8000247C.
(AIS Parse): Processing command 2: 0x58535906.
(AIS Parse): Performing Opcode Sync...
(AIS Parse): Performing jump and close...
(AIS Parse): AIS complete. Jump to address 0x80000000.
(AIS Parse): Waiting for DONE...
(AIS Parse): Boot completed successfully.

Waiting for SFT on the OMAP-L138...
Target: BOOTUBL
Target: DONE

Flashing UBL UBL_SPI_MEM.ais (8396 bytes) at 0x00000000

Target:         INFO: SPI Memory Initialization passed.
Target: Flashing UBL...
Target: SENDIMG
Target: BEGIN
100% [ ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª ]
Image data transmitted over UART.
Target:    DONE
0% [ ------------------------------------------------------------ ]
0% Programming UBL into flash...
50% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
100% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
Verifying...
100% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
UBL programming complete
Target: DONE

Flashing application u-boot.bin (260568 bytes) at 0x00010000

Target: SENDIMG
Target: BEGIN
100% [ ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª ]
Image data transmitted over UART.
Target:    DONE
0% [ ------------------------------------------------------------ ]
Programming application into flash...
0%
1% Target: Doing block erase.Doing block erase.Doing block erase.Doing bloc
3% e.ªENDING
4% ªªrget: SENDING
6% ªªªget: SENDING
7% ªªªªet: SENDING
9% ªªªªªt: SENDING
11% ªªªªªª: SENDING
12% ªªªªªªª SENDING
14% ªªªªªªªªSENDING
15% ªªªªªªªªªENDING
17% ªªªªªªªªªªNDING
19% ªªªªªªªªªªªDING
20% ªªªªªªªªªªªªING
22% ªªªªªªªªªªªªªNG
23% ªªªªªªªªªªªªªªG
25% ªªªªªªªªªªªªªªª
26% ªªªªªªªªªªªªªªªª
28% ªªªªªªªªªªªªªªªªª
30% ªªªªªªªªªªªªªªªªªª
31% ªªªªªªªªªªªªªªªªªªª
33% ªªªªªªªªªªªªªªªªªªªª
34% ªªªªªªªªªªªªªªªªªªªª
36% ªªªªªªªªªªªªªªªªªªªªª
38% ªªªªªªªªªªªªªªªªªªªªªª
39% ªªªªªªªªªªªªªªªªªªªªªªª
41% ªªªªªªªªªªªªªªªªªªªªªªªª
42% ªªªªªªªªªªªªªªªªªªªªªªªªª
44% ªªªªªªªªªªªªªªªªªªªªªªªªªª
46% ªªªªªªªªªªªªªªªªªªªªªªªªªªª
47% ªªªªªªªªªªªªªªªªªªªªªªªªªªªª
49% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
50% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
52% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
53% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
55% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
57% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
58% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
60% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
61% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
63% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
65% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
66% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
68% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
69% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
71% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
73% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
74% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
76% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
77% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
79% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
80% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
82% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
84% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
85% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
87% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
88% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
90% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
92% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
93% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
95% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
96% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
98% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
100% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
Verifying...
100% ªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªªª
Application programming complete
Target: DONE
Target: DONE

Operation completed successfully.

RE: continual reboot - Added by Michael Williamson over 12 years ago

Argh. The SPI reprogramming doesn't wipe the u-Boot environment or the FPGA environment, so it just picks back up where it left off. I think we need to update the flashing utility to wipe the u-Boot environment and/or the FLASH environment. Not sure I have a solution for you at the moment, Craig. You've managed to find a path we haven't covered yet!

Let me see what we can come up with, it might take a bit of time, though...

-Mike

RE: continual reboot - Added by Craig Meyers over 12 years ago

Would this work?

sfh_OMAP-L138 -erase

help sez:
Global erase of the flash memory device (no input files)

RE: continual reboot - Added by Michael Williamson over 12 years ago

Should. You'll need to reflash again the u-Boot and UBL. Give it a try. (good catch, BTW).

-Mike

RE: continual reboot - Added by Craig Meyers over 12 years ago

sfh_OMAP-L138 -erase -p COM7 worked!!

    (1-6/6)
    Go to top
    Add picture from clipboard (Maximum size: 1 GB)