Usage of GP0 pins on MityDSP-L138F (Posted on behalf of a Customer)
Added by Angela Newman about 12 years ago
My programmers need to know:
What (if anything) is connected to the GPIO pins on port GP0 onboard the MityDSP-L138F board.
What we want to hear is that the CPU GPIO pins are wired only to the pins of the 200-pin SODIMM connecter, and nothing else. Is this true?
If not, what are the other connections?
It appears that the pin mux registers are configured so that not all of these pins are used as GPIO. Is this deliberate?
Where would we make changes in the software (u-boot, Linux kernel, etc) to configure all these pins as standard GPIO?
Replies (1)
RE: Usage of GP0 pins on MityDSP-L138F (Posted on behalf of a Customer) - Added by Michael Williamson about 12 years ago
The datasheet for the MityDSP-L138F contains this information. Perhaps it is not clear?
Table 1 in the datasheet lists for Pin-Out for the SOM. For the pins labelled "GP0_X", Table 2 in the datasheet describes them as:
"These pins are direct connects to the corresponding GP0_X pins on the OMAP-L138 processor." There are no other connections on the module to pins with this label.
U-Boot does not modify these pins from the default power up condition, because we do not know what final product the module might end up in, so they are left in the default Hi-Impedence state. You will need to modify your kernel (or u-Boot) to configure these settings per your board requirements.
The kernel build for the Industrial I/O board does not set all the GP0_X pins to GPIO because some of the pins are used in different multiplexed options (e.g., the AUDIO signals related to the McASP are used rather than as GPIOs). Details for that can be found in the arch/arm/mach-davinci/baseboard-industrialio.c file in the recent MDK branches of the kernel (mitydsp-linux-v3.2). You should create your own baseboard configuration and modify the pin-mux settings there if you want to control the mux settings from the kernel.
-Mike
