JFFS2 driver errors
Added by Steven Hill over 10 years ago
I'm seeing some errors similar to those mentioned in the following thread:
http://support.criticallink.com/redmine/boards/12/topics/2954
I am using the CL FPGA modules for EMIF, etc with no changes and making DMA transfers from the FPGA. I don't know if I should be concerned about these errors, or if my DMA transfers are being compromised as well...I'm seeing errors like:
root@mityomapl138:/mnt/user_nand# mtd->read(0x984 bytes from 0x3768c18) returned ECC error
Data CRC failed on REF_PRISTINE data node at 0x03768c18: Read 0xd5ffae84, calculated 0x533eb09a
mtd->read(0xa18 bytes from 0x376bdec) returned ECC error
Data CRC failed on REF_PRISTINE data node at 0x0376bdec: Read 0x031b1385, calculated 0x333e2d9f
mtd->read(0x898 bytes from 0x376f794) returned ECC error
Data CRC failed on REF_PRISTINE data node at 0x0376f794: Read 0x7fb3eadc, calculated 0x755c84f8
At one point when I was running the application automatically on boot-up there were so many errors that it was not possible to log in and I had to re-flash the file system. Are there some changes that can be made to the EMIF configuration to deal with these issues?
Replies (3)
RE: JFFS2 driver errors - Added by Michael Williamson over 10 years ago
Hi Steven,
Is the DMA priority configured higher than the ARM data access priority in the Master Priority Configuration registers (see the OMAP-L138 Technical Reference Manual regarding DMA bus mastering priority)?
We have seen FPGA DMA's interfering with the linux NAND based driver (they share the same bus), one work-around has been to lower the DMA priority to allow the NAND driver cleaner access to the EMIFA bus.
If this is not an option, there is a patch that can be made to the linux kernel that may resolve the issue at the potential cost of lower NAND performance.
-Mike
RE: JFFS2 driver errors - Added by Steven Hill over 10 years ago
Thanks for those suggestions, Mike. According to Table 11-2, the default priority for EDMA is 0 (highest) and for ARM instruction and data is 2 (lower). When I look at these registers in debug mode (DSP), I see these default priorities in SYSCFG0DSP:MSTPRI0 and SYSCFG0DSP:MSTPRI1 Would you suggest making the ARM priority equal to 0 as well, or switching the priorities (ARM instruction/data = 0, EDMA = 2)? And how would I change these registers? Can I write directly to them? According to the literature, access is only available in privileged mode - how to I get into that mode?
RE: JFFS2 driver errors - Added by Michael Williamson over 10 years ago
You can do it in the DSP using tcDspSyscfg::SetMasterPriority() in the dsp core library.
-Mike
