Pixel Clock B2521
Added by Kyle McKinney over 4 years ago
So I finally figure out the problem, my frame grabber can only handle a 60Mhz pixel clock. Is it possible to lower the pixel clock from 85 to 60?
RE: Pixel Clock B2521 - Added by Michael Williamson over 4 years ago
At the moment, the camera link serializer / pixel clock is fixed at 85 MHz. We would need to make you a custom FPGA image to drop the PLL rate down from 85 to 60. I need to see how complex that would be and get back to you.
It might be quicker to use an EPIX card, which we have qualified at the 85 MHz rate.
RE: Pixel Clock B2521 - Added by Kyle McKinney over 4 years ago
Yes I think it is time to upgrade the FG. Thanks for all the help.