Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

03/27/2011

05:55 PM Software Development: RE: Problem with FPGA reload

I think this is a problem with the unload of the fpga_gpio driver. I am not sure if it is unregistering with the gpi... Michael Williamson

04:42 PM Software Development: RE: FPGA_GPIO input polling

Hi Brian,
The gpiolib framework is a little more rigid than I had hoped, and updating the fpga_gpio driver to incl... Michael Williamson

03/25/2011

12:04 PM Software Development: RE: FPGA_GPIO input polling

Hi Brian,
The current fpga-gpio arm linux driver does not support interrupt notification at the moment. However, ... Michael Williamson

11:13 AM Software Development: FPGA_GPIO input polling

Hi
I'm trying to get my user application notified when a FPGA GPIO input pin goes high.
I have created a FPGA ... Brian Rasmussen

03/24/2011

11:09 AM Software Development: Problem with FPGA reload

Hi
I have a minor problem when I reload the FPGA image after the OMAP has booted into Linux. I'm not able to expor... Brian Rasmussen

03/20/2011

10:16 PM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?

I'm also looking for the files, would you plese email me too. zhiming wu

03/18/2011

10:40 AM Software Development: RE: Include Path / Where is the correct source files?

Hi Mike
I have now found out how to map kernel space into user space, though I don't have an example working yet.
... Brian Rasmussen

04:29 AM Software Development: RE: Include Path / Where is the correct source files?

Hi Mike,
I will search the net for a mmap example. Regarding the NAND device it is already mounted.
Thanks for ... Brian Rasmussen

03/17/2011

12:51 PM Software Development: RE: Include Path / Where is the correct source files?

Brian,
Good to hear the gpio is working for you.
You are trying to memory map FPGA space into userspace. The w... Michael Williamson

10:43 AM Software Development: RE: Include Path / Where is the correct source files?

Hi Mike
I now have the FPGA communication up and running, and I can toggle an FPGA output pin from the command lin... Brian Rasmussen

03/10/2011

02:17 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

David
the mount is done by udev. The scripts for udev are in /etc/udev/scripts
the file mount.sh is the one that mo... Tim Iskander

02:12 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Tim,
Thanks, remounting the drive in async mode drastically increased performance. I am now getting 4.3MB/s using... david kasper

03/05/2011

10:21 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Michael Williamson wrote:
> Hi David,
>
> TI has published performance numbers for their basic kernel (which our ... Tim Iskander

10:14 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Hi David,
TI has published performance numbers for their basic kernel (which our port essentially sits on top of) ... Michael Williamson

10:05 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Tom,
Thanks for your response. We would desire 4MB/s. Do you know how close to that number we could achieve?
... david kasper

09:19 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Hi David,
What throughput do you need or expect to get? I don't think the SD card is ever going to be as fast as ... Thomas Catalino

03/04/2011

09:39 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux

Mike,
The micro SD card is functioning with a FAT filesystem in our system. However, the write bandwith is slower... david kasper

03/01/2011

08:25 AM FPGA Development: RE: FPGA example source

Hi Mike,
thanks for your response. I would like a simple gpio example for the fpga using the fpga_gpio.ko driver f... Brian Rasmussen

07:28 AM FPGA Development: RE: FPGA example source

Hi Brian,
I can provide you with an example project if you are still stuck. Sorry for the delay. Please advise... Michael Williamson

08:08 AM Software Development: RE: Include Path / Where is the correct source files?

Hi Mike
Thanks for your response. I am trying to access the EMIF from my application. I will prefer not to write a... Brian Rasmussen

07:26 AM Software Development: RE: Include Path / Where is the correct source files?

Hi Brian,
Are you trying to write a driver or trying to access the EMIF via your application? Typically, direct m... Michael Williamson

02/28/2011

09:18 AM Software Development: Include Path / Where is the correct source files?

Hi
I am trying to interface to the FPGA on a MityDSP-L138 board. I have succeeded building a new kernel, insertin... Brian Rasmussen

02/26/2011

02:13 PM Software Development: RE: dsplink debugging issue

Hi Susan,
It looks like Richard raised this issue on the TI E2E site, here:
http://e2e.ti.com/support/developme... Michael Williamson