Activity
From 03/06/2011 to 04/04/2011
03/28/2011
- BR 02:47 AM Software Development: RE: FPGA_GPIO input polling
- Hi Mike
Thanks for your answer.
It would be nice to have the FPGA_gpio interrupt (poll) function working, so I'm looking forward to hear from you.
My question came up because I was looking for an easy way to interrupt my user s...
03/27/2011
- MW 05:55 PM Software Development: RE: Problem with FPGA reload
- I think this is a problem with the unload of the fpga_gpio driver. I am not sure if it is unregistering with the gpiolib layer. I am trying to reproduce the problem here.
-Mike
- MW 04:42 PM Software Development: RE: FPGA_GPIO input polling
- Hi Brian,
The gpiolib framework is a little more rigid than I had hoped, and updating the fpga_gpio driver to include poll(2) notification using the edge file is going to require a bit more work. The change requires creating software...
03/25/2011
- MW 12:04 PM Software Development: RE: FPGA_GPIO input polling
- Hi Brian,
The current fpga-gpio arm linux driver does not support interrupt notification at the moment. However, I think I can update the driver to support this function fairly quickly. Let me see if I can get you something in the n... - Hi
I'm trying to get my user application notified when a FPGA GPIO input pin goes high.
I have created a FPGA image containing the FPGA Base (EMIFA) and GPIO modules. I can now toggle output pins and read status for input pins (in...
03/24/2011
- Hi
I have a minor problem when I reload the FPGA image after the OMAP has booted into Linux. I'm not able to export and toggle GPIO's using the sysfs (sys/class/gpio).
If I boot the complete system like this, it works fine:
1. Bo...
03/20/2011
- ZW 10:16 PM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
- I'm also looking for the files, would you plese email me too.
03/18/2011
- BR 10:40 AM Software Development: RE: Include Path / Where is the correct source files?
- Hi Mike
I have now found out how to map kernel space into user space, though I don't have an example working yet.
Another question has come up: Will I be able to read/write to the FPGA through the EMIFA, if I just map the memory ar... - BR 04:29 AM Software Development: RE: Include Path / Where is the correct source files?
- Hi Mike,
I will search the net for a mmap example. Regarding the NAND device it is already mounted.
Thanks for your help so far.
Best regards
Brian
03/17/2011
- MW 12:51 PM Software Development: RE: Include Path / Where is the correct source files?
- Brian,
Good to hear the gpio is working for you.
You are trying to memory map FPGA space into userspace. The way to go for that is to implement the mmap feature in your kernel driver. I think there are some examples on the web fo... - BR 10:43 AM Software Development: RE: Include Path / Where is the correct source files?
- Hi Mike
I now have the FPGA communication up and running, and I can toggle an FPGA output pin from the command line (using /sys/class/gpio/...). So far so good! :-)
Next step is to re-work the FPGA modules and the linux drivers... ...
03/10/2011
- TI 02:17 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux
- David
the mount is done by udev. The scripts for udev are in /etc/udev/scripts
the file mount.sh is the one that mounts the fs and sets the options
cheers
/Tim - DK 02:12 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux
- Tim,
Thanks, remounting the drive in async mode drastically increased performance. I am now getting 4.3MB/s using 1K block writes (versus 0.2 MB/s for sync mode). Where is the hot plug script located on the file system? I plan on m...