Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

12/09/2011

ME 08:57 AM Software Development: RE: Using the EMIFA interface on the Mitydsp-1810

We changed chip select to CS4 and kept having the same issues. We've done some other measurements and tests and we now doubt it's some kind of contention, it is most likely some problem on the ASIC side rather than the arm side of things... Mattias Ekstrom

MW 07:39 AM Software Development: RE: Using the EMIFA interface on the Mitydsp-1810

Hi Mattias,
The only chip select used on the EMIFA by default is CS3 (used for the NAND). Our FPGA driver framework uses CS5, but if you don't load the modules for the drivers (e.g., fpga_ctrl.ko) then that CS should not be used duri... Michael Williamson

ME 03:58 AM Software Development: RE: Using the EMIFA interface on the Mitydsp-1810

Hi,
I was wondering which chip selects are unused by default? What I can see in the u-boot and linux source is that only CS2 and CS3 are used. We're using chip select 5 right now but we're having some issues and I'm not sure what's ca... Mattias Ekstrom

12/07/2011

SW 04:37 PM FPGA Development: RE: FPGA load causes reboot

Mike,
Your .bin file loaded up fine. I had the designer look at the build, and he had some IO not constrained corectly. I think it might have been to the EMIFA interface. He has fixed that and I was able to load up the build and acce... Scott Whitney

MW 09:38 AM FPGA Development: RE: FPGA load causes reboot

Scott,
My suspicion is that the pins tied to the EMIFA (a chip select line, a wait line, or perhaps the data lines) are being driving when they shouldn't be. I would double check your bitstream configuration options for unused IOBs, ... Michael Williamson

12/06/2011

SW 03:43 PM FPGA Development: RE: FPGA load causes reboot

Mike,
The arm is idle when it dies. I will post some captured text. It looks like it can't access the flash memory. We are downloading via jtag. Scott Whitney

MW 03:27 PM FPGA Development: RE: FPGA load causes reboot

Can you post what the ARM console sees when it crashes? You are downloading via JTAG, correct?
Is the ARM running the UPP when it dies, or is the FPGA basically idle?
-Mike
Michael Williamson

SW 03:15 PM FPGA Development: RE: FPGA load causes reboot

Mike,
I had our fpga designer rebuild our smaller (uPP interface) build that we were running the lx16 and retarget it for the xl45. It was able to download the design successfully, but very shortly afterwords the ARM crashes. Scott Whitney

SW 01:14 PM FPGA Development: RE: FPGA load causes reboot

Mike,
Thanks for the quick reply. this is the only lx45 board in house now. I think we are expecting a few more to come in shortly. This is a new design. We have an lx16 and our designer took this design and stripped most of it out ... Scott Whitney

MW 01:04 PM FPGA Development: RE: FPGA load causes reboot

Hi Scott,
Have you confirmed your image works on other MityDSP-L138F with lx56 FPGA modules or is this a new FPGA design? If it is the former, we can send some test .bit images to confirm a hardware problem. If it is the latter, you... Michael Williamson

SW 12:58 PM FPGA Development: FPGA load causes reboot

Hello,
We just got a new mityDSP l138 with the lx45 FPGA. When I try downloading my fpga build via jtag it fails. I get a Programming terminated DONE did not go high error in impact. When this happens the ARM reboots. Any ideas on t... Scott Whitney