Activity
From 01/26/2017 to 02/24/2017
02/22/2017
- Good day,
I'm trying to set up the “DSP Hello World” from the Wiki instructions (https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Hello_World). “Compiling for the ARM” was ommited, as the main goal is to run ...
02/17/2017
- JC 02:00 PM FPGA Development: RE: Problems building the Kernel
- Your right I can't find the u-boot-tools archive anymore.
Luckily the mkimage tool is built by u-boot. So it can be copied to the system so its available in the path.
Instructions partially from https://support.criticallink.com/red... - HB 01:39 PM FPGA Development: RE: Problems building the Kernel
- Hi Jonathan,
We followed the instructions in the link, but we continue having problems to get the U-boot-tools package, it updated some other things, but we got this error:
*W: Failed to fetch http://ppa.launchpad.net/u-boot-tool... - JC 12:34 PM FPGA Development: RE: Problems building the Kernel
- We are working on releasing new versions of the VM. In the mean time you can change the repos so they point to the "old-releases".
http://askubuntu.com/questions/91815/how-to-install-software-or-upgrade-from-an-old-unsupported-release?... - Hi all,
I´m trying to do the "FPGA GPIO Core Example":https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/FPGA_Core_Device_Drivers#FPGA-GPIO-Core-Example
In the step #1 "Load an FPGA image with a GPIO core componen...
02/15/2017
- Hello, good day,
I am working with the MitySOM-1810F PROFIBUS Development kit which includes the AM1810 ARM Microprocessor For PROFIBUS and Spartan 6, I would like to implement the UART core for FPGA which is located in:
\fpga\cor...
02/14/2017
- JA 09:24 AM PCB Development: RE: FPGA CLOCK LOCATION
- Hello, Good day
Thank you for the answer, I have been working only with the FPGA without using the EMIF interface between the L138 and FPGA.
I want to implement a code done in VHDL and my design contains a clock in its operation l...
01/31/2017
- AB 06:48 PM PCB Development: RE: FPGA CLOCK LOCATION
- Alex,
Thank you for reaching out to us about this question.
On our MitySOM-L138F family modules we have the EMIF bus from the OMAP-L138 connected to the Xilinx Spartan 6 FPGA to allow for communications of cores between the process...
01/30/2017
- Hello good day I developing a new project in ISE WEBPACK using the PROFIBUS DEVELOPMENT KIT with the MitySOM-1810F Processor Card.
I am programming the FPGA and this is my entity:
PORT(
*CLK50* : IN STD_LOGIC;
RX : IN STD_LOG...