Activity
From 07/10/2016 to 08/08/2016
08/05/2016
- 02:05 PM Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hi Jared,
Sorry for the delay.
I just pushed a dizzy(1.7) branch to our git repo: http://support.criticallink.c...
08/03/2016
- 03:27 PM Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
I proceeded to try to use Yocto to build the Altera 4.1.22 LTSI RT kernel based on your suggestions abo...
08/02/2016
- 11:55 AM Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Jared,
That sounds like a perfect approach. For building the file system we do use yocto, which as you saw i... - 10:26 AM Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
I've been going through the instructions on the Wiki to get an SD card image of my creation working. I'...
07/29/2016
- 03:01 PM Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Jared,
I did a quick test here and was able to boot altera's 4.1.22 ltsi rt kernel using the MitySOM-5CSX de...
07/28/2016
- Context: My company recently purchased some MitySOM 5CSX Development Boards and would like to use them on a current p...
07/11/2016
- 09:41 AM FPGA Development: RE: 5CSX-H6-53B-RC with PCIe Hard IP (Root)
- Hi Tom,
As the Root Port, the HPS will control the reset to the PCIe. This can be an HPS GPIO, loaned pin, or FPG... - 09:02 AM FPGA Development: RE: 5CSX-H6-53B-RC with PCIe Hard IP (Root)
- After a bit of rearranging, I've gained the use 179 (B8A_RX_T1_N/CLK7n) for the PERSTn. I believe that should work fi...
- 08:37 AM FPGA Development: RE: 5CSX-H6-53B-RC with PCIe Hard IP (Root)
- Hi Adam,
Thanks, I hadn't realised that restriction was just on CvP. As we don't need that, you say that any IO ca... - 08:11 AM FPGA Development: RE: 5CSX-H6-53B-RC with PCIe Hard IP (Root)
- Hi Thomas,
The Cyclone V has a mode where it can be configured using CvP (Config via Protocol) - this configures t...
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