Mity CPU Platforms

01/23/2025

08:40 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MTU increase Issue

What Dan showed you will start your application in the console... if your application exits (or you kill it with ctrl... Tim Iskander

06:55 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MTU increase Issue

Hello,
As Tim said an application launched through cron won't have access to standard in and out. What you could d... Daniel Vincelette

03:17 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MTU increase Issue

Hi,
I am currently working with the MitySOM Cyclone V device, which has only a single UART port. During boot-up, t... Bhardwaj Kotha

01/21/2025

02:09 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MTU increase Issue

If your program is reading from standard input, it will not be able to read anything when launched from cron. cron jo... Tim Iskander

01:03 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Issue with crontab

Hi,
MTU size issue was Resolved, and now I am facing with Crontab.
Actually I am running an application code on b... Bhardwaj Kotha

01:43 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access

The Quartus Platform designer adds logic between the AXI bridge (not sure which bridge you are using) and your Avalon... Michael Williamson

01:18 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board Logic Utilization Issue

Hi,
I am working on Data transmission from HPS to FPGA fabric, So i am used Avalon Memory Interface in Platform De... Bhardwaj Kotha

01/20/2025

07:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: linux-cl-ti warnings (or perhaps notes?)

Thanks Nathan, I see this warning as well.
This warning is generated because we are setting the kernel defconfig i... Jonathan Cormier

07:13 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: linux-cl-ti warnings (or perhaps notes?)

WARNING: linux-cl-ti-6.6.32+git-r0 do_kernel_metadata: [NOTE]: defconfig was supplied both via KBUILD_DEFCONFIG and S... Nathan Wright

03:54 PM MitySOM-C10L FPGA Development: RE: Issue compiling MitySOM-C10L FPGA Reference Design

Hi Lucas,
Our example reference designs were implemented and tested with Quartus version 22.1. We would recommend ... Mike Fiorenza

01/17/2025

02:22 PM MitySOM-C10L FPGA Development: Issue compiling MitySOM-C10L FPGA Reference Design

Compilation of reference design fails. The issue seems to be that it does not find UART IP. Maybe it is because it is... Lucas Diodati