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Using the EMIFA to read/write FPGA registers
Added by Marc Lichtman over 13 years ago
Hey All,
I am trying to access the FPGA registers using the EMIFA, but I am having trouble finding documentation explaining the basics of how to tell the EMIFA to read a register in the FPGA. I'm using the DSP core of the OMAPL138, with CCSv4 and SYS/BIOS. The default values for the "Asynchronous n Configuration Register" seem to be fine, and the FPGA is connected to CS4 according to the VHDL (I'm using critical link provided FPGA code, and the version is pasted below).
constant FPGA_APPLICATION_ID: std_logic_vector(7 downto 0) := CONV_STD_LOGIC_VECTOR( 00, 8);
constant FPGA_VERSION_MAJOR: std_logic_vector(3 downto 0) := CONV_STD_LOGIC_VECTOR( 01, 4);
constant FPGA_VERSION_MINOR: std_logic_vector(3 downto 0) := CONV_STD_LOGIC_VECTOR( 00, 4);
-Marc
Replies (7)
RE: Using the EMIFA to read/write FPGA registers - Added by Gregory Gluszek over 13 years ago
Hi Marc,
The FPGA registers are memory mapped starting at DSP address 0x66000000. The registers for each additional core start at subsequent offsets of 0x80.
\Greg
RE: Using the EMIFA to read/write FPGA registers - Added by Marc Lichtman over 13 years ago
So does the EMIFA just run in the background and constantly refresh the values? Or does it perform an action when you go to read a value from DSP memory?
RE: Using the EMIFA to read/write FPGA registers - Added by Michael Williamson over 13 years ago
Marc,
Are you using CS4 or CS5?
0x66000000 corresponds to CS5.
-Mike
RE: Using the EMIFA to read/write FPGA registers - Added by Marc Lichtman over 13 years ago
Well the wiki says CS5 is used for the DSP, but when I look at the VHDL it says CS4.
RE: Using the EMIFA to read/write FPGA registers - Added by Marc Lichtman over 13 years ago
I tried to use the following code to write and read from a register. I used both CS4 and CS5 (0x64000000 and 0x66000000 respectively)
UInt32 *Fpga_mem_ptr = (unsigned int *)0x64000000;
UInt32 Fpga_mem_write = 0x45678932;
UInt32 Fpga_mem_read;
*Fpga_mem_ptr = Fpga_mem_write; //writes to memory
Fpga_mem_read = *Fpga_mem_ptr; //reads from memory
It runs, but does not seem to work (according to the debugger's memory window in CCS).
-Marc
RE: Using the EMIFA to read/write FPGA registers - Added by Michael Williamson over 13 years ago
Well, OK.
If you are using our framework with the base module, the address at offset zero corresponds to a read only register.
Try offset 0x40, which corresponds to a scratch RAM we implemented in the FPGA. You should also (though not required) consider using shorts (uint16's), as the buswidth is only 16 bits wide. 32 bits will cause two cycles to be posted, which will usually work on cores implemented by Critical Link but sometimes the order of a 32 bit register decode mattes.
Do you have a license for chipscope? You can use chipscope to watch the EMIF transactions directly via the FPGA JTAG interface if you are not familiar with it's use.
Also, please ensure that you have caching of the memory space you are trying to use disabled.
-Mike
RE: Using the EMIFA to read/write FPGA registers - Added by Marc Lichtman over 13 years ago
It worked! I changed to 0x40 and used 16 bit numbers. Here's the new code that worked-
UInt32 *Fpga_mem_ptr = (unsigned int *)0x66000040; //use CS5
UInt16 Fpga_mem_write = 0x45678932;
UInt16 Fpga_mem_read;
*Fpga_mem_ptr = Fpga_mem_write; //writes to memory
Fpga_mem_read = *Fpga_mem_ptr; //reads from memory
-Marc
