Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

Hello Conor,

Some background: the MMCSD1 was routed through the FPGA because it is pin-muxed with the UPP channel 0, which gets used quite a bit by our customers to push acquisition data from the FPGA into the OMAP-L138 processor. Our initial use cases did not include using the second MMC controller, and we had an app note for a 1.8 V level translator for a specific Wifi module frmo TI that we never got around to fielding.

The level translator was a TWL1200, which dealt with SDIO as well as UART and a couple of other peripherals. It's probably not the cheapest solution. It was designed to mate up with a WL1271/3. We don't have working experience with this part at CL, but I think that TI may have mated this to an OMAP-L138 or an AM-1808 for wireless demonstrations.

-Mike

Ah yes, that makes sense - I forgot about the degree of pin muxing going on in the L138 and the UPP would make sense there. My design is based around the WL1271 as well actually, although I've no reason to suppose a TXB0108 wouldn't do the job. Plus initial development with 48 pin BGA doesn't really appeal to me! At least the Critical Link module is well documented.

I can use MMCSD0 without any problems whatsoever and drop SD Card support - I can use USB Mass storage and frankly prefer to.

I thought I'd ask you guys later about using the MMC 0 for SDIO devices like the WL1271, but "arch/arm/mach-davinci/baseboard-industrialio.c" seems to be a good place to start. I believe I can use any of the GPIO pins for IRQ and WLAN_ENABLE - you use GPIO_4[0 and 1] for MMSD_CD_PIN and WP so there doesn't look like any reason not to use GPIO_5[14 and 15] for irq and en.

There are wl12xx drivers in the linux kernel and settings for the Pandaboard (OMAP4430) so plenty to get started with.

By the way, I've tested the Tplink TL-WN821N USB Wireless adapter (Atheros AR7010 chipset) and it works fine (comes up and pings anyway) with your online docs plus the requisite firmware (http://linuxwireless.org/download/htc_fw/1.3/htc_7010.fw).

Thanks - Conor.

Sorry, I meant GPIO_0[6 or 7 or 13 or 15] as they are on the J700 connector along with MMCSD0...

Further to this - I have my WL1271 module hooked up to the MityDSP board. However the driver just powers up and down and up and... It successfully toggles GPIO0/5 each time (it's not 7 as documented in MityDSP baseboard docs). I took the code from the da850 evm baseboard file and ported it over to my own.

But it does this whether or not my module interface board is present or not. So I'm missing something silly. You've already said you don't have wl1271 experience but you might have an idea what's happening. If I'm using MMCSD0 for an SDIO peripheral like this, should I disable something else?

Thanks - Conor.

Hi Critical Link engineers:

If I probe (carefully) pin 5 of an SD card in place, I see the SDIO Clock. My scope says it's 37.5MHz and 3.5V roughly.

According to the datasheet if I then hook up a probe to J700, pin 23 on the Industrial I/O Board I should also see the MMCSD0 CLK signal. But I don't see anything. Is there a configuration issue or a jumper I'm missing here?

I have the latest version of the Industrial I/O board.

There is also a mistake in the datasheet for the Industrial IO board - Pin 19 is labelled GPIO0/7. It isn't that GPIO output at all. It's GPIO0/5. The schematic for the latest board is correct.

Any help would be appreciated. Thanks, Conor.

None of the documented MMCSD0 connections on the J700 are wired up. Be nice if that was documented.

Hi Conor,

You're right. I am trying to figure out what happened here and I see a note in a review that there was concern (not confirmed, mind you) about leaving stubs on the MMC signal path by running the nets to both the SD Card connector and J700, and the decision was made to depopulate R700-R705 (which make the connections you are trying to work with). We did not capture that fact in the documentation. The published schematic contains this information, but not the board datasheet.

I apologize and appreciate your very warranted irritation.

We'll certainly fix the documentation, it clearly needs scrubbing. If you want we can install the jumper resistors for you (but it will take the shipping back-and-forth time), though I suspect your are past that now.

... with hat in hand...

-Mike

Thanks Mike. Once I saw it, I realised the reason why - that stubs on the connector line would warrant concern. Plus when you sent me the link to the versioning page on another posting, I noted the red Xs over the MMCSD0 pins but I failed to check what that meant on the physical PCB. So it's my fault too really! The schematic is always the main reference.

My line impedences on my test board are a touch off (ie: nowhere near 50 ohm) so rather than shorting them, I'll dig up some 0402 33R resistors and put them on the board. With the microscope and a touch less caffeine it's should be no trouble really.

Thanks guys -- Conor.

Conor,

We have addressed the MMC issues in the datasheet which can be found here by selecting the latest board version: http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information

During the review of the datasheet we also found that some of the FPGA IO pins (beyond the one on J700 you mentioned) that were mislabeled compared to the development kit baseboard schematic.

Thank you,

Alex