Problem building IndustrialIO project build_lcd_rev_c
Added by Steven Hill over 11 years ago
Following on from a similar question in the forum "Creating FPGA Base-Project - core manager problem" I am trying to build the "build_lcd_rev_c" project. I have used the .vhd files from MDK_2013-05-15/fpga/vhdl and the netlist (.ngc) files from MDK_2013-05-15/fpga/cores/build_spartan6, but the project will not build. The synthesis errors and warnings are attached in a png file.
I am tempted to modify IndustrialIO_top.vhd by commenting out all the generation steps based on board revs A and B, but really have no idea what the implications might be.
Can anyone help out?
| Capture.PNG (16.4 KB) Capture.PNG | Screen shot of synthesis warnings and errors |
Replies (6)
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Gregory Gluszek over 11 years ago
Hi Steven,
The issue here is that entity description for the i2c component has changed since the Rev A and B boards. All the code in the "rev_ab : if BOARD_REV = "A" or BOARD_REV = "B" generate" statement is going to be ultimately ignored if you are building for the Rev C. However, even though that code is going to not be generated, the vhdl compiler still does some basic checking of it, hence the compilation failure. So, if you remove all the Rev A and B specific code everything still should build fine. I also did a quick check and just removed the generic map for the i2c component and the build_lcd_rev_c project synthesized correctly, so that is another option if you don't want to risk accidentally removing some code you weren't supposed to.
Please let us know if you have any further issues.
Thanks,
\Greg
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Steven Hill over 11 years ago
I built a simple project based on files for GPIO_Test from Conor O in the post "Xilinx design suite 14.2 and MDK_2012-08-10" in this forum. This project built with no errors. I imported the .ipf file from the build_lcd_rev_c example and renamed it GPIO_Test, then double-clicked on Manage Configuration Project (following instructions from the "Programming FPGA" post (the first post in this forum). After changing the process options to use this .ipf file, I right clicked on the xc6slx16 device and chose :Assign new configuration file" and then chose the .bit file from the selection window and clicked "Open". A small "OK" window appears and I clicked on that, but was then taken back to the file selection window. This loop could go on forever... I can't get the device to accept the bit file, and there is no information or log file to tell me what is going on...so at this point I have a project that synthesized properly with no errors, but I can't create a proper .bin file to program the FPGA with. Any ideas?
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Michael Williamson over 11 years ago
Not having the tools up in front of me. I think you can put more than one bit file into a configuration PROM (to support chained programming). Once you select the first part, just click cancel for additional parts and move onto the file generation process.
-Mike
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Steven Hill over 11 years ago
That does not seem to work. WHen I double click on "Generate File" I get a big red "Generate Failed" box. The word "bypass" under the XILINX device should change to the file name and it doesn't. I have attached a snapshot of the impact window showing the console output...
| Capture.PNG (88.9 KB) Capture.PNG | Impact window showing console |
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Michael Williamson over 11 years ago
OK clearly it's not finding the file (according to the log). Looks like you have spaces in your path to the bit file, that may be the problem. You might try to copy the bit file to a local path and see if it can open it up. Also, make sure that your prom size is auto-selected or is large enough to hold the image.
You might try the Xilinx web forums for help on this, they are pretty good about supporting their tools. (I've not had any problem like this with projects here).
-Mike
RE: Problem building IndustrialIO project build_lcd_rev_c - Added by Steven Hill over 11 years ago
I found the solution to the problem. I had to remove the Xilinx device that was in the iMPACT window (left over from the original IndustrialIO example project .ipf file, I assume) and the add a new device which is done by selecting the bit file from the project. Then I chose a PROM size large enough to hold the .bit file and generated the .bin file and it worked. Next I will see if I can program the FPGA in UBoot...
