SPI clock polarity
Question received outside of Redmine:
I am trying to interface a SPI device to the MightDSP board. The clock requirement for this device is that the clock polarity should be high, that is normally high when not being asserted. I have tried to get the clock polarity to change by doing the following:
devinfo.cfg.mode |= SPI_MODE_CSHOLD_HIGH | SPI_MODE_CKPHASE_HALF | SPI_MODE_CKPOL_HIGH; retval = spi_setcfg(spi_handle, device, &devinfo.cfg);
The clock polarity does not change no matter whether SPI_MODE_CKPOL_HIGH is used or not. I checked the devinfo structure and the bit is being set and cleared.
Thanks for the help.
RE: SPI clock polarity - Added by John Pruitt about 9 years ago
It looks like the spi driver does not do anything with the SPI_MODE_CKPOL_HIGH flag you are trying to use.
I haven't tried this with an actual device, but this is my guess on how to fix this. In the file named:
around line 50, the code looks like:
*pfmt |= DM6446_SPIFMT_PRESCALE(prescale); if (cfg->mode & SPI_MODE_CKPHASE_HALF) *pfmt |= DM6446_SPIFMT_PHASE1; if (!(cfg->mode & SPI_MODE_BODER_MSB)) *pfmt |= DM6446_SPIFMT_SHIFTLSB;
Change this code to:
*pfmt |= DM6446_SPIFMT_PRESCALE(prescale); if (cfg->mode & SPI_MODE_CKPHASE_HALF) *pfmt |= DM6446_SPIFMT_PHASE1; if (cfg->mode & SPI_MODE_CSPOL_HIGH) *pfmt |= DM6446_SPIFMT_POLARITY1; if (!(cfg->mode & SPI_MODE_BODER_MSB)) *pfmt |= DM6446_SPIFMT_SHIFTLSB;
Hope this helps.