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Boot configuration jumpers
Added by Alexandre Lopes over 9 years ago
Hi,
Can someone please shed me some light on the boot configuration jumpers of the MitySOM-5CSX Dev-Kit? On the datasheet it simply says:
"The MitySOM-5CSX Development Kits default boot configuration mode is shown in Figure 3 below. As seen this equates to a boot configuration setting of S1 to S10, 0000011101. Please reference the Cyclone V Technical Reference Manual for complete details on how the vast array of boot mode options.". The problem is that Altera uses a totally different labelling and I couldn't find any correspondence (perhaps I'm just missing the right source).
From what it seems to me, the least 3 least significant bits correspond to J28, J29 and J30 in the Altera Dev Board, i.e. the boot source. So in our case that would correspond to 101 = 0x4: 1.8 V SD/MMC. But what do the other jumpers correspond to? For example, which jumpers correspond to the CSLE pins (J26 and J27 in Altera's Dev Board)?
It would be nice to have a clear correspondence.
Thank you.
Best regards,
Alexandre Lopes
Replies (2)
RE: Boot configuration jumpers - Added by Adam Dziedzic over 9 years ago
Sorry this isn't clear. There is silkscreen labeling below the switch corresponding to the switch locations 1-10: MSEL[0-4], CSEL[0-1], BSEL[0-2]. CSEL is Clock Select and BSEL is Boot Select. The QSPI interface is running at 1.8V and the SD interface is 3.3V. Please let us know if you need any further information.
Thanks,
Adam
RE: Boot configuration jumpers - Added by Alexandre Lopes over 9 years ago
Thank you very much. As I've seen the labeling is to the right of the switch (in my case), hence I didn't pay attention to it. Also, what I wrote should obviously read 101 = 0x5: 3.3 V SD/MMC, lack of sleep does that.
Best,
Alexandre
